[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
diff --git a/llvm/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll b/llvm/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll
index 76d2a1a..b8543bc 100644
--- a/llvm/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll
+++ b/llvm/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll
@@ -13,16 +13,16 @@
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
call void @llvm.dbg.declare(metadata i32* %a_addr, metadata !0, metadata !{}), !dbg !7
store i32 %a, i32* %a_addr
- %0 = load i32* %a_addr, align 4, !dbg !8 ; <i32> [#uses=1]
+ %0 = load i32, i32* %a_addr, align 4, !dbg !8 ; <i32> [#uses=1]
call void @llvm.dbg.declare(metadata i32* %x_addr.i, metadata !9, metadata !{}) nounwind, !dbg !15
store i32 %0, i32* %x_addr.i
call void @llvm.dbg.declare(metadata i64* %y_addr.i, metadata !16, metadata !{}) nounwind, !dbg !15
store i64 55, i64* %y_addr.i
call void @llvm.dbg.declare(metadata i8** %z_addr.i, metadata !17, metadata !{}) nounwind, !dbg !15
store i8* bitcast (void (i32)* @baz to i8*), i8** %z_addr.i
- %1 = load i32* %x_addr.i, align 4, !dbg !18 ; <i32> [#uses=1]
- %2 = load i64* %y_addr.i, align 8, !dbg !18 ; <i64> [#uses=1]
- %3 = load i8** %z_addr.i, align 8, !dbg !18 ; <i8*> [#uses=1]
+ %1 = load i32, i32* %x_addr.i, align 4, !dbg !18 ; <i32> [#uses=1]
+ %2 = load i64, i64* %y_addr.i, align 8, !dbg !18 ; <i64> [#uses=1]
+ %3 = load i8*, i8** %z_addr.i, align 8, !dbg !18 ; <i8*> [#uses=1]
call void @foo(i32 %1, i64 %2, i8* %3) nounwind, !dbg !18
br label %return, !dbg !19