[CodeGen] Print live-out register lists as liveout(...) in both MIR and debug output
Work towards the unification of MIR and debug output by printing
`liveout(...)` instead of `<regliveout>`.
Only debug syntax is affected.
llvm-svn: 320683
diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp
index 7ffdbea..009722b 100644
--- a/llvm/lib/CodeGen/MachineOperand.cpp
+++ b/llvm/lib/CodeGen/MachineOperand.cpp
@@ -637,9 +637,25 @@
OS << ">";
break;
}
- case MachineOperand::MO_RegisterLiveOut:
- OS << "<regliveout>";
+ case MachineOperand::MO_RegisterLiveOut: {
+ const uint32_t *RegMask = getRegLiveOut();
+ OS << "liveout(";
+ if (!TRI) {
+ OS << "<unknown>";
+ } else {
+ bool IsCommaNeeded = false;
+ for (unsigned Reg = 0, E = TRI->getNumRegs(); Reg < E; ++Reg) {
+ if (RegMask[Reg / 32] & (1U << (Reg % 32))) {
+ if (IsCommaNeeded)
+ OS << ", ";
+ OS << printReg(Reg, TRI);
+ IsCommaNeeded = true;
+ }
+ }
+ }
+ OS << ")";
break;
+ }
case MachineOperand::MO_Metadata:
OS << '<';
getMetadata()->printAsOperand(OS, MST);