TableGen: use PrintMethods to print more aliases

llvm-svn: 208607
diff --git a/llvm/test/CodeGen/ARM64/fast-isel-icmp.ll b/llvm/test/CodeGen/ARM64/fast-isel-icmp.ll
index 68a76c9..971be5c 100644
--- a/llvm/test/CodeGen/ARM64/fast-isel-icmp.ll
+++ b/llvm/test/CodeGen/ARM64/fast-isel-icmp.ll
@@ -4,7 +4,7 @@
 entry:
 ; CHECK: icmp_eq_imm
 ; CHECK: cmp  w0, #31
-; CHECK: csinc w0, wzr, wzr, ne
+; CHECK: cset w0, eq
   %cmp = icmp eq i32 %a, 31
   %conv = zext i1 %cmp to i32
   ret i32 %conv
@@ -14,7 +14,7 @@
 entry:
 ; CHECK: icmp_eq_neg_imm
 ; CHECK: cmn  w0, #7
-; CHECK: csinc w0, wzr, wzr, ne
+; CHECK: cset w0, eq
   %cmp = icmp eq i32 %a, -7
   %conv = zext i1 %cmp to i32
   ret i32 %conv
@@ -24,7 +24,7 @@
 entry:
 ; CHECK: icmp_eq
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, ne
+; CHECK: cset w0, eq
   %cmp = icmp eq i32 %a, %b
   %conv = zext i1 %cmp to i32
   ret i32 %conv
@@ -34,7 +34,7 @@
 entry:
 ; CHECK: icmp_ne
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, eq
+; CHECK: cset w0, ne
   %cmp = icmp ne i32 %a, %b
   %conv = zext i1 %cmp to i32
   ret i32 %conv
@@ -44,7 +44,7 @@
 entry:
 ; CHECK: icmp_ugt
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, ls
+; CHECK: cset w0, hi
   %cmp = icmp ugt i32 %a, %b
   %conv = zext i1 %cmp to i32
   ret i32 %conv
@@ -54,7 +54,7 @@
 entry:
 ; CHECK: icmp_uge
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, lo
+; CHECK: cset w0, hs
   %cmp = icmp uge i32 %a, %b
   %conv = zext i1 %cmp to i32
   ret i32 %conv
@@ -64,7 +64,7 @@
 entry:
 ; CHECK: icmp_ult
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, hs
+; CHECK: cset w0, lo
   %cmp = icmp ult i32 %a, %b
   %conv = zext i1 %cmp to i32
   ret i32 %conv
@@ -74,7 +74,7 @@
 entry:
 ; CHECK: icmp_ule
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, hi
+; CHECK: cset w0, ls
   %cmp = icmp ule i32 %a, %b
   %conv = zext i1 %cmp to i32
   ret i32 %conv
@@ -84,7 +84,7 @@
 entry:
 ; CHECK: icmp_sgt
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, le
+; CHECK: cset w0, gt
   %cmp = icmp sgt i32 %a, %b
   %conv = zext i1 %cmp to i32
   ret i32 %conv
@@ -94,7 +94,7 @@
 entry:
 ; CHECK: icmp_sge
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, lt
+; CHECK: cset w0, ge
   %cmp = icmp sge i32 %a, %b
   %conv = zext i1 %cmp to i32
   ret i32 %conv
@@ -104,7 +104,7 @@
 entry:
 ; CHECK: icmp_slt
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, ge
+; CHECK: cset w0, lt
   %cmp = icmp slt i32 %a, %b
   %conv = zext i1 %cmp to i32
   ret i32 %conv
@@ -114,7 +114,7 @@
 entry:
 ; CHECK: icmp_sle
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, gt
+; CHECK: cset w0, le
   %cmp = icmp sle i32 %a, %b
   %conv = zext i1 %cmp to i32
   ret i32 %conv
@@ -124,7 +124,7 @@
 entry:
 ; CHECK: icmp_i64
 ; CHECK: cmp  x0, x1
-; CHECK: csinc w{{[0-9]+}}, wzr, wzr, gt
+; CHECK: cset w{{[0-9]+}}, le
   %cmp = icmp sle i64 %a, %b
   %conv = zext i1 %cmp to i32
   ret i32 %conv
@@ -136,7 +136,7 @@
 ; CHECK: sxth w0, w0
 ; CHECK: sxth w1, w1
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, ne
+; CHECK: cset w0, eq
   %cmp = icmp eq i16 %a, %b
   ret i1 %cmp
 }
@@ -147,7 +147,7 @@
 ; CHECK: sxtb w0, w0
 ; CHECK: sxtb w1, w1
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, ne
+; CHECK: cset w0, eq
   %cmp = icmp eq i8 %a, %b
   ret i1 %cmp
 }
@@ -158,7 +158,7 @@
 ; CHECK: uxth w0, w0
 ; CHECK: uxth w1, w1
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, hs
+; CHECK: cset w0, lo
   %cmp = icmp ult i16 %a, %b
   %conv2 = zext i1 %cmp to i32
   ret i32 %conv2
@@ -170,7 +170,7 @@
 ; CHECK: sxtb w0, w0
 ; CHECK: sxtb w1, w1
 ; CHECK: cmp  w0, w1
-; CHECK: csinc w0, wzr, wzr, le
+; CHECK: cset w0, gt
   %cmp = icmp sgt i8 %a, %b
   %conv2 = zext i1 %cmp to i32
   ret i32 %conv2
@@ -182,7 +182,7 @@
 ; CHECK: icmp_i16_signed_const
 ; CHECK: sxth w0, w0
 ; CHECK: cmn  w0, #233
-; CHECK: csinc w0, wzr, wzr, ge
+; CHECK: cset w0, lt
 ; CHECK: and w0, w0, #0x1
   %cmp = icmp slt i16 %a, -233
   %conv2 = zext i1 %cmp to i32
@@ -194,7 +194,7 @@
 ; CHECK: icmp_i8_signed_const
 ; CHECK: sxtb w0, w0
 ; CHECK: cmp  w0, #124
-; CHECK: csinc w0, wzr, wzr, le
+; CHECK: cset w0, gt
 ; CHECK: and w0, w0, #0x1
   %cmp = icmp sgt i8 %a, 124
   %conv2 = zext i1 %cmp to i32
@@ -206,7 +206,7 @@
 ; CHECK: icmp_i1_unsigned_const
 ; CHECK: and w0, w0, #0x1
 ; CHECK: cmp  w0, #0
-; CHECK: csinc w0, wzr, wzr, hs
+; CHECK: cset w0, lo
 ; CHECK: and w0, w0, #0x1
   %cmp = icmp ult i1 %a, 0
   %conv2 = zext i1 %cmp to i32