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Jia Liub22310f2012-02-18 12:03:15 +00001//===-- PPCSchedule.td - PowerPC Scheduling Definitions ----*- tablegen -*-===//
2//
Jim Laskeyc6533002005-10-18 16:23:40 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattnerf3ebc3f2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Jia Liub22310f2012-02-18 12:03:15 +00007//
Jim Laskeyc6533002005-10-18 16:23:40 +00008//===----------------------------------------------------------------------===//
9
Jim Laskeyc6533002005-10-18 16:23:40 +000010//===----------------------------------------------------------------------===//
Jim Laskeyc6533002005-10-18 16:23:40 +000011// Instruction Itinerary classes used for PowerPC
12//
Hal Finkel3e5a3602013-11-27 23:26:09 +000013def IIC_IntSimple : InstrItinClass;
14def IIC_IntGeneral : InstrItinClass;
15def IIC_IntCompare : InstrItinClass;
Hal Finkel11d3c562015-02-01 17:52:16 +000016def IIC_IntISEL : InstrItinClass;
Hal Finkel3e5a3602013-11-27 23:26:09 +000017def IIC_IntDivD : InstrItinClass;
18def IIC_IntDivW : InstrItinClass;
19def IIC_IntMFFS : InstrItinClass;
20def IIC_IntMFVSCR : InstrItinClass;
21def IIC_IntMTFSB0 : InstrItinClass;
22def IIC_IntMTSRD : InstrItinClass;
23def IIC_IntMulHD : InstrItinClass;
24def IIC_IntMulHW : InstrItinClass;
25def IIC_IntMulHWU : InstrItinClass;
26def IIC_IntMulLI : InstrItinClass;
27def IIC_IntRFID : InstrItinClass;
28def IIC_IntRotateD : InstrItinClass;
29def IIC_IntRotateDI : InstrItinClass;
30def IIC_IntRotate : InstrItinClass;
31def IIC_IntShift : InstrItinClass;
32def IIC_IntTrapD : InstrItinClass;
33def IIC_IntTrapW : InstrItinClass;
34def IIC_BrB : InstrItinClass;
35def IIC_BrCR : InstrItinClass;
36def IIC_BrMCR : InstrItinClass;
37def IIC_BrMCRX : InstrItinClass;
38def IIC_LdStDCBA : InstrItinClass;
39def IIC_LdStDCBF : InstrItinClass;
40def IIC_LdStDCBI : InstrItinClass;
41def IIC_LdStLoad : InstrItinClass;
42def IIC_LdStLoadUpd : InstrItinClass;
Hal Finkel46402a42013-11-30 20:41:13 +000043def IIC_LdStLoadUpdX : InstrItinClass;
Hal Finkel3e5a3602013-11-27 23:26:09 +000044def IIC_LdStStore : InstrItinClass;
45def IIC_LdStStoreUpd : InstrItinClass;
46def IIC_LdStDSS : InstrItinClass;
47def IIC_LdStICBI : InstrItinClass;
48def IIC_LdStLD : InstrItinClass;
49def IIC_LdStLDU : InstrItinClass;
Hal Finkel46402a42013-11-30 20:41:13 +000050def IIC_LdStLDUX : InstrItinClass;
Hal Finkel3e5a3602013-11-27 23:26:09 +000051def IIC_LdStLDARX : InstrItinClass;
52def IIC_LdStLFD : InstrItinClass;
53def IIC_LdStLFDU : InstrItinClass;
Hal Finkel46402a42013-11-30 20:41:13 +000054def IIC_LdStLFDUX : InstrItinClass;
Hal Finkel3e5a3602013-11-27 23:26:09 +000055def IIC_LdStLHA : InstrItinClass;
56def IIC_LdStLHAU : InstrItinClass;
Hal Finkel46402a42013-11-30 20:41:13 +000057def IIC_LdStLHAUX : InstrItinClass;
Hal Finkel3e5a3602013-11-27 23:26:09 +000058def IIC_LdStLMW : InstrItinClass;
59def IIC_LdStLVecX : InstrItinClass;
60def IIC_LdStLWA : InstrItinClass;
61def IIC_LdStLWARX : InstrItinClass;
62def IIC_LdStSLBIA : InstrItinClass;
63def IIC_LdStSLBIE : InstrItinClass;
64def IIC_LdStSTD : InstrItinClass;
65def IIC_LdStSTDCX : InstrItinClass;
66def IIC_LdStSTDU : InstrItinClass;
Hal Finkel46402a42013-11-30 20:41:13 +000067def IIC_LdStSTDUX : InstrItinClass;
Hal Finkel3e5a3602013-11-27 23:26:09 +000068def IIC_LdStSTFD : InstrItinClass;
69def IIC_LdStSTFDU : InstrItinClass;
70def IIC_LdStSTVEBX : InstrItinClass;
71def IIC_LdStSTWCX : InstrItinClass;
72def IIC_LdStSync : InstrItinClass;
Chuang-Yu Chengeaf4b3d2016-04-06 01:46:45 +000073def IIC_LdStCOPY : InstrItinClass;
74def IIC_LdStPASTE : InstrItinClass;
Hal Finkel3e5a3602013-11-27 23:26:09 +000075def IIC_SprISYNC : InstrItinClass;
76def IIC_SprMFSR : InstrItinClass;
77def IIC_SprMTMSR : InstrItinClass;
78def IIC_SprMTSR : InstrItinClass;
79def IIC_SprTLBSYNC : InstrItinClass;
80def IIC_SprMFCR : InstrItinClass;
Hal Finkel46402a42013-11-30 20:41:13 +000081def IIC_SprMFCRF : InstrItinClass;
Hal Finkel3e5a3602013-11-27 23:26:09 +000082def IIC_SprMFMSR : InstrItinClass;
83def IIC_SprMFSPR : InstrItinClass;
84def IIC_SprMFTB : InstrItinClass;
85def IIC_SprMTSPR : InstrItinClass;
86def IIC_SprMTSRIN : InstrItinClass;
87def IIC_SprRFI : InstrItinClass;
88def IIC_SprSC : InstrItinClass;
89def IIC_FPGeneral : InstrItinClass;
90def IIC_FPAddSub : InstrItinClass;
91def IIC_FPCompare : InstrItinClass;
92def IIC_FPDivD : InstrItinClass;
93def IIC_FPDivS : InstrItinClass;
94def IIC_FPFused : InstrItinClass;
95def IIC_FPRes : InstrItinClass;
Hal Finkel46402a42013-11-30 20:41:13 +000096def IIC_FPSqrtD : InstrItinClass;
97def IIC_FPSqrtS : InstrItinClass;
Hal Finkel3e5a3602013-11-27 23:26:09 +000098def IIC_VecGeneral : InstrItinClass;
99def IIC_VecFP : InstrItinClass;
100def IIC_VecFPCompare : InstrItinClass;
101def IIC_VecComplex : InstrItinClass;
102def IIC_VecPerm : InstrItinClass;
103def IIC_VecFPRound : InstrItinClass;
104def IIC_VecVSL : InstrItinClass;
105def IIC_VecVSR : InstrItinClass;
106def IIC_SprMTMSRD : InstrItinClass;
107def IIC_SprSLIE : InstrItinClass;
108def IIC_SprSLBIE : InstrItinClass;
Chuang-Yu Chengeaf4b3d2016-04-06 01:46:45 +0000109def IIC_SprSLBIEG : InstrItinClass;
Hal Finkel3e5a3602013-11-27 23:26:09 +0000110def IIC_SprSLBMTE : InstrItinClass;
111def IIC_SprSLBMFEE : InstrItinClass;
Hal Finkel28842b92016-09-02 23:42:01 +0000112def IIC_SprSLBMFEV : InstrItinClass;
Hal Finkel3e5a3602013-11-27 23:26:09 +0000113def IIC_SprSLBIA : InstrItinClass;
Chuang-Yu Chengeaf4b3d2016-04-06 01:46:45 +0000114def IIC_SprSLBSYNC : InstrItinClass;
Joerg Sonnenbergerc03105b2014-08-02 20:16:29 +0000115def IIC_SprTLBIA : InstrItinClass;
Hal Finkel3e5a3602013-11-27 23:26:09 +0000116def IIC_SprTLBIEL : InstrItinClass;
117def IIC_SprTLBIE : InstrItinClass;
Chuang-Yu Chengeaf4b3d2016-04-06 01:46:45 +0000118def IIC_SprABORT : InstrItinClass;
119def IIC_SprMSGSYNC : InstrItinClass;
120def IIC_SprSTOP : InstrItinClass;
Justin Hibbits10b61472017-01-29 04:55:57 +0000121def IIC_SprMFPMR : InstrItinClass;
122def IIC_SprMTPMR : InstrItinClass;
Jim Laskeyc6533002005-10-18 16:23:40 +0000123
124//===----------------------------------------------------------------------===//
125// Processor instruction itineraries.
126
Jim Laskey74ab9962005-10-19 19:51:16 +0000127include "PPCScheduleG3.td"
Hal Finkel6fa56972011-10-17 04:03:49 +0000128include "PPCSchedule440.td"
Jim Laskey74ab9962005-10-19 19:51:16 +0000129include "PPCScheduleG4.td"
130include "PPCScheduleG4Plus.td"
131include "PPCScheduleG5.td"
Hal Finkel42daeae2013-11-30 20:55:12 +0000132include "PPCScheduleP7.td"
Will Schmidteba49232014-12-03 18:46:30 +0000133include "PPCScheduleP8.td"
Ehsan Amiri6c17bb02016-12-19 13:35:45 +0000134include "PPCScheduleP9.td"
Hal Finkel9f9f8922012-04-01 19:22:40 +0000135include "PPCScheduleA2.td"
Hal Finkel742b5352012-08-28 16:12:39 +0000136include "PPCScheduleE500mc.td"
137include "PPCScheduleE5500.td"