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Alex Bradbury6b2cca72016-11-01 23:47:30 +00001//===-- RISCVMCTargetDesc.cpp - RISCV Target Descriptions -----------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// This file provides RISCV-specific target descriptions.
11///
12//===----------------------------------------------------------------------===//
13
14#include "RISCVMCTargetDesc.h"
15#include "RISCVMCAsmInfo.h"
16#include "llvm/ADT/STLExtras.h"
17#include "llvm/MC/MCAsmInfo.h"
18#include "llvm/MC/MCInstrInfo.h"
19#include "llvm/MC/MCRegisterInfo.h"
20#include "llvm/MC/MCStreamer.h"
21#include "llvm/MC/MCSubtargetInfo.h"
22#include "llvm/Support/ErrorHandling.h"
23#include "llvm/Support/TargetRegistry.h"
24
25#define GET_INSTRINFO_MC_DESC
26#include "RISCVGenInstrInfo.inc"
27
28#define GET_REGINFO_MC_DESC
29#include "RISCVGenRegisterInfo.inc"
30
31using namespace llvm;
32
33static MCInstrInfo *createRISCVMCInstrInfo() {
34 MCInstrInfo *X = new MCInstrInfo();
35 InitRISCVMCInstrInfo(X);
36 return X;
37}
38
39static MCRegisterInfo *createRISCVMCRegisterInfo(const Triple &TT) {
40 MCRegisterInfo *X = new MCRegisterInfo();
41 InitRISCVMCRegisterInfo(X, RISCV::X1_32);
42 return X;
43}
44
45static MCAsmInfo *createRISCVMCAsmInfo(const MCRegisterInfo &MRI,
46 const Triple &TT) {
Alex Bradburyd36e04c2017-02-14 05:15:24 +000047 return new RISCVMCAsmInfo(TT);
Alex Bradbury6b2cca72016-11-01 23:47:30 +000048}
49
50extern "C" void LLVMInitializeRISCVTargetMC() {
51 for (Target *T : {&getTheRISCV32Target(), &getTheRISCV64Target()}) {
Alex Bradburyd36e04c2017-02-14 05:15:24 +000052 TargetRegistry::RegisterMCAsmInfo(*T, createRISCVMCAsmInfo);
Alex Bradbury6b2cca72016-11-01 23:47:30 +000053 TargetRegistry::RegisterMCInstrInfo(*T, createRISCVMCInstrInfo);
54 TargetRegistry::RegisterMCRegInfo(*T, createRISCVMCRegisterInfo);
55 TargetRegistry::RegisterMCAsmBackend(*T, createRISCVAsmBackend);
56 TargetRegistry::RegisterMCCodeEmitter(*T, createRISCVMCCodeEmitter);
57 }
58}