blob: 02c3c05e7945ef63902ee8668da323a33f83624b [file] [log] [blame]
Mikael Holmenece84cd2017-02-14 06:37:42 +00001; RUN: llc < %s | FileCheck %s
2
3target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
4target triple = "amdgcn--"
5
6; We need to compile this for a target where we have different address spaces,
7; and where pointers in those address spaces have different size.
8; E.g. for amdgcn-- pointers in address space 0 are 32 bits and pointers in
9; address space 1 are 64 bits.
10
11; We shouldn't crash. Check that we get a loop with the two stores.
12;CHECK-LABEL: foo:
13;CHECK: [[LOOP_LABEL:BB[0-9]+_[0-9]+]]:
14;CHECK: buffer_store_dword
15;CHECK: buffer_store_dword
16;CHECK: s_branch [[LOOP_LABEL]]
17
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000018define amdgpu_kernel void @foo() {
Mikael Holmenece84cd2017-02-14 06:37:42 +000019entry:
20 br label %loop
21
22loop:
23 %idx0 = phi i32 [ %next_idx0, %loop ], [ 0, %entry ]
24 %0 = getelementptr inbounds i32, i32* null, i32 %idx0
25 %1 = getelementptr inbounds i32, i32 addrspace(1)* null, i32 %idx0
26 store i32 1, i32* %0
27 store i32 7, i32 addrspace(1)* %1
28 %next_idx0 = add nuw nsw i32 %idx0, 1
29 br label %loop
30}
31