blob: 133c2aa7d07d4c7d2c24255517018e79580fc054 [file] [log] [blame]
Krzysztof Parzyszek046090d2018-03-12 14:01:28 +00001; RUN: llc -march=hexagon < %s
2; REQUIRES: asserts
3; The test case validates the fact that if the modifier register value "-268430336"
4; is passed as target constant, then the compiler must not assert.
5; This test also validates that the VLIW Packetizer does not bail out the compilation
6; with "Unknown .new type" when attempting to validate if the circular store can be
7; converted to a new value store.
8
9target triple = "hexagon"
10
11; Function Attrs: nounwind
12define zeroext i8 @f0(i8* %a0) local_unnamed_addr #0 {
13b0:
14 %v0 = tail call { i32, i8* } @llvm.hexagon.L2.loadrub.pcr(i8* %a0, i32 -268430336, i8* %a0)
15 %v1 = extractvalue { i32, i8* } %v0, 0
16 %v2 = trunc i32 %v1 to i8
17 ret i8 %v2
18}
19
20; Function Attrs: argmemonly nounwind
21declare { i32, i8* } @llvm.hexagon.L2.loadrub.pcr(i8*, i32, i8* nocapture) #1
22
23; Function Attrs: nounwind
24define void @f1(i8* %a0, i8 zeroext %a1) local_unnamed_addr #0 {
25b0:
26 %v0 = zext i8 %a1 to i32
27 %v1 = tail call i8* @llvm.hexagon.S2.storerb.pcr(i8* %a0, i32 -268430336, i32 %v0, i8* %a0)
28 ret void
29}
30
31; Function Attrs: argmemonly nounwind
32declare i8* @llvm.hexagon.S2.storerb.pcr(i8*, i32, i32, i8* nocapture) #1
33
34attributes #0 = { nounwind "target-cpu"="hexagonv60" }
35attributes #1 = { argmemonly nounwind }