Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame^] | 1 | ; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s |
| 2 | |
| 3 | define i32 @t1(i32 %a, i32 %b) { |
| 4 | ; CHECK: @t1 |
| 5 | ; CHECK: sdiv w2, w0, w1 |
| 6 | ; CHECK: msub w2, w2, w1, w0 |
| 7 | %1 = srem i32 %a, %b |
| 8 | ret i32 %1 |
| 9 | } |
| 10 | |
| 11 | define i64 @t2(i64 %a, i64 %b) { |
| 12 | ; CHECK: @t2 |
| 13 | ; CHECK: sdiv x2, x0, x1 |
| 14 | ; CHECK: msub x2, x2, x1, x0 |
| 15 | %1 = srem i64 %a, %b |
| 16 | ret i64 %1 |
| 17 | } |
| 18 | |
| 19 | define i32 @t3(i32 %a, i32 %b) { |
| 20 | ; CHECK: @t3 |
| 21 | ; CHECK: udiv w2, w0, w1 |
| 22 | ; CHECK: msub w2, w2, w1, w0 |
| 23 | %1 = urem i32 %a, %b |
| 24 | ret i32 %1 |
| 25 | } |
| 26 | |
| 27 | define i64 @t4(i64 %a, i64 %b) { |
| 28 | ; CHECK: @t4 |
| 29 | ; CHECK: udiv x2, x0, x1 |
| 30 | ; CHECK: msub x2, x2, x1, x0 |
| 31 | %1 = urem i64 %a, %b |
| 32 | ret i64 %1 |
| 33 | } |