Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 1 | //===-- RegAllocBase.h - basic regalloc interface and driver --*- C++ -*---===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file defines the RegAllocBase class, which is the skeleton of a basic |
| 11 | // register allocation algorithm and interface for extending it. It provides the |
| 12 | // building blocks on which to construct other experimental allocators and test |
| 13 | // the validity of two principles: |
Andrew Trick | fce64c9 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 14 | // |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 15 | // - If virtual and physical register liveness is modeled using intervals, then |
| 16 | // on-the-fly interference checking is cheap. Furthermore, interferences can be |
| 17 | // lazily cached and reused. |
Andrew Trick | fce64c9 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 18 | // |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 19 | // - Register allocation complexity, and generated code performance is |
| 20 | // determined by the effectiveness of live range splitting rather than optimal |
| 21 | // coloring. |
| 22 | // |
| 23 | // Following the first principle, interfering checking revolves around the |
| 24 | // LiveIntervalUnion data structure. |
| 25 | // |
| 26 | // To fulfill the second principle, the basic allocator provides a driver for |
| 27 | // incremental splitting. It essentially punts on the problem of register |
| 28 | // coloring, instead driving the assignment of virtual to physical registers by |
| 29 | // the cost of splitting. The basic allocator allows for heuristic reassignment |
| 30 | // of registers, if a more sophisticated allocator chooses to do that. |
| 31 | // |
| 32 | // This framework provides a way to engineer the compile time vs. code |
Cameron Zwarich | bfef075 | 2010-12-29 04:42:39 +0000 | [diff] [blame] | 33 | // quality trade-off without relying on a particular theoretical solver. |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 34 | // |
| 35 | //===----------------------------------------------------------------------===// |
| 36 | |
Benjamin Kramer | a7c40ef | 2014-08-13 16:26:38 +0000 | [diff] [blame] | 37 | #ifndef LLVM_LIB_CODEGEN_REGALLOCBASE_H |
| 38 | #define LLVM_LIB_CODEGEN_REGALLOCBASE_H |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 39 | |
Jakob Stoklund Olesen | 21914ab | 2013-08-14 17:28:42 +0000 | [diff] [blame] | 40 | #include "llvm/CodeGen/LiveInterval.h" |
Chandler Carruth | 802d755 | 2012-12-04 07:12:27 +0000 | [diff] [blame] | 41 | #include "llvm/CodeGen/RegisterClassInfo.h" |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 42 | |
| 43 | namespace llvm { |
| 44 | |
Andrew Trick | 84aef49 | 2010-10-26 18:34:01 +0000 | [diff] [blame] | 45 | template<typename T> class SmallVectorImpl; |
| 46 | class TargetRegisterInfo; |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 47 | class VirtRegMap; |
Andrew Trick | 84aef49 | 2010-10-26 18:34:01 +0000 | [diff] [blame] | 48 | class LiveIntervals; |
Jakob Stoklund Olesen | 03b87d5 | 2012-06-20 22:52:24 +0000 | [diff] [blame] | 49 | class LiveRegMatrix; |
Andrew Trick | 89eb6a8 | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 50 | class Spiller; |
Andrew Trick | 84aef49 | 2010-10-26 18:34:01 +0000 | [diff] [blame] | 51 | |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 52 | /// RegAllocBase provides the register allocation driver and interface that can |
| 53 | /// be extended to add interesting heuristics. |
| 54 | /// |
Andrew Trick | fce64c9 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 55 | /// Register allocators must override the selectOrSplit() method to implement |
Jakob Stoklund Olesen | 2329c54 | 2011-02-22 23:01:52 +0000 | [diff] [blame] | 56 | /// live range splitting. They must also override enqueue/dequeue to provide an |
| 57 | /// assignment order. |
Benjamin Kramer | 079b96e | 2013-09-11 18:05:11 +0000 | [diff] [blame] | 58 | class RegAllocBase { |
Juergen Ributzka | d12ccbd | 2013-11-19 00:57:56 +0000 | [diff] [blame] | 59 | virtual void anchor(); |
Jakob Stoklund Olesen | 20f19eb | 2012-01-11 23:19:08 +0000 | [diff] [blame] | 60 | protected: |
| 61 | const TargetRegisterInfo *TRI; |
| 62 | MachineRegisterInfo *MRI; |
| 63 | VirtRegMap *VRM; |
| 64 | LiveIntervals *LIS; |
Jakob Stoklund Olesen | 03b87d5 | 2012-06-20 22:52:24 +0000 | [diff] [blame] | 65 | LiveRegMatrix *Matrix; |
Jakob Stoklund Olesen | 20f19eb | 2012-01-11 23:19:08 +0000 | [diff] [blame] | 66 | RegisterClassInfo RegClassInfo; |
| 67 | |
Wei Mi | 9a16d65 | 2016-04-13 03:08:27 +0000 | [diff] [blame] | 68 | /// Inst which is a def of an original reg and whose defs are already all |
| 69 | /// dead after remat is saved in DeadRemats. The deletion of such inst is |
| 70 | /// postponed till all the allocations are done, so its remat expr is |
| 71 | /// always available for the remat of all the siblings of the original reg. |
| 72 | SmallPtrSet<MachineInstr *, 32> DeadRemats; |
| 73 | |
Craig Topper | ada0857 | 2014-04-16 04:21:27 +0000 | [diff] [blame] | 74 | RegAllocBase() |
| 75 | : TRI(nullptr), MRI(nullptr), VRM(nullptr), LIS(nullptr), Matrix(nullptr) {} |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 76 | |
Andrew Trick | e8719c5 | 2010-10-22 23:33:19 +0000 | [diff] [blame] | 77 | virtual ~RegAllocBase() {} |
| 78 | |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 79 | // A RegAlloc pass should call this before allocatePhysRegs. |
Jakob Stoklund Olesen | 2d2dec9 | 2012-06-20 22:52:29 +0000 | [diff] [blame] | 80 | void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat); |
Jakob Stoklund Olesen | 50215af | 2011-05-10 17:37:41 +0000 | [diff] [blame] | 81 | |
Andrew Trick | 84aef49 | 2010-10-26 18:34:01 +0000 | [diff] [blame] | 82 | // The top-level driver. The output is a VirtRegMap that us updated with |
| 83 | // physical register assignments. |
Andrew Trick | 84aef49 | 2010-10-26 18:34:01 +0000 | [diff] [blame] | 84 | void allocatePhysRegs(); |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 85 | |
Wei Mi | 9a16d65 | 2016-04-13 03:08:27 +0000 | [diff] [blame] | 86 | // Include spiller post optimization and removing dead defs left because of |
| 87 | // rematerialization. |
| 88 | virtual void postOptimization(); |
| 89 | |
Andrew Trick | 89eb6a8 | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 90 | // Get a temporary reference to a Spiller instance. |
| 91 | virtual Spiller &spiller() = 0; |
Andrew Trick | fce64c9 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 92 | |
Jakob Stoklund Olesen | 2329c54 | 2011-02-22 23:01:52 +0000 | [diff] [blame] | 93 | /// enqueue - Add VirtReg to the priority queue of unassigned registers. |
| 94 | virtual void enqueue(LiveInterval *LI) = 0; |
| 95 | |
| 96 | /// dequeue - Return the next unassigned register, or NULL. |
| 97 | virtual LiveInterval *dequeue() = 0; |
Jakob Stoklund Olesen | e0df786 | 2010-12-08 22:22:41 +0000 | [diff] [blame] | 98 | |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 99 | // A RegAlloc pass should override this to provide the allocation heuristics. |
Andrew Trick | 84aef49 | 2010-10-26 18:34:01 +0000 | [diff] [blame] | 100 | // Each call must guarantee forward progess by returning an available PhysReg |
| 101 | // or new set of split live virtual registers. It is up to the splitter to |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 102 | // converge quickly toward fully spilled live ranges. |
Andrew Trick | fce64c9 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 103 | virtual unsigned selectOrSplit(LiveInterval &VirtReg, |
Mark Lacey | f9ea885 | 2013-08-14 23:50:04 +0000 | [diff] [blame] | 104 | SmallVectorImpl<unsigned> &splitLVRs) = 0; |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 105 | |
Jakob Stoklund Olesen | 92da705 | 2010-12-11 00:19:56 +0000 | [diff] [blame] | 106 | // Use this group name for NamedRegionTimer. |
Craig Topper | 9fdc70e | 2013-07-17 03:11:32 +0000 | [diff] [blame] | 107 | static const char TimerGroupName[]; |
Jakob Stoklund Olesen | 92da705 | 2010-12-11 00:19:56 +0000 | [diff] [blame] | 108 | |
Quentin Colombet | a799e2e | 2015-01-08 01:16:39 +0000 | [diff] [blame] | 109 | /// Method called when the allocator is about to remove a LiveInterval. |
| 110 | virtual void aboutToRemoveInterval(LiveInterval &LI) {} |
| 111 | |
Jakob Stoklund Olesen | 2e98ee3 | 2010-12-17 23:16:35 +0000 | [diff] [blame] | 112 | public: |
| 113 | /// VerifyEnabled - True when -verify-regalloc is given. |
| 114 | static bool VerifyEnabled; |
| 115 | |
Andrew Trick | fce64c9 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 116 | private: |
Jakob Stoklund Olesen | 2329c54 | 2011-02-22 23:01:52 +0000 | [diff] [blame] | 117 | void seedLiveRegs(); |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 118 | }; |
| 119 | |
Andrew Trick | 1c24605 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 120 | } // end namespace llvm |
| 121 | |
Benjamin Kramer | a7c40ef | 2014-08-13 16:26:38 +0000 | [diff] [blame] | 122 | #endif |