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Andrew Trick1c246052010-10-22 23:09:15 +00001//===-- RegAllocBase.h - basic regalloc interface and driver --*- C++ -*---===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the RegAllocBase class, which is the skeleton of a basic
11// register allocation algorithm and interface for extending it. It provides the
12// building blocks on which to construct other experimental allocators and test
13// the validity of two principles:
Andrew Trickfce64c92010-11-30 23:18:47 +000014//
Andrew Trick1c246052010-10-22 23:09:15 +000015// - If virtual and physical register liveness is modeled using intervals, then
16// on-the-fly interference checking is cheap. Furthermore, interferences can be
17// lazily cached and reused.
Andrew Trickfce64c92010-11-30 23:18:47 +000018//
Andrew Trick1c246052010-10-22 23:09:15 +000019// - Register allocation complexity, and generated code performance is
20// determined by the effectiveness of live range splitting rather than optimal
21// coloring.
22//
23// Following the first principle, interfering checking revolves around the
24// LiveIntervalUnion data structure.
25//
26// To fulfill the second principle, the basic allocator provides a driver for
27// incremental splitting. It essentially punts on the problem of register
28// coloring, instead driving the assignment of virtual to physical registers by
29// the cost of splitting. The basic allocator allows for heuristic reassignment
30// of registers, if a more sophisticated allocator chooses to do that.
31//
32// This framework provides a way to engineer the compile time vs. code
Cameron Zwarichbfef0752010-12-29 04:42:39 +000033// quality trade-off without relying on a particular theoretical solver.
Andrew Trick1c246052010-10-22 23:09:15 +000034//
35//===----------------------------------------------------------------------===//
36
Benjamin Kramera7c40ef2014-08-13 16:26:38 +000037#ifndef LLVM_LIB_CODEGEN_REGALLOCBASE_H
38#define LLVM_LIB_CODEGEN_REGALLOCBASE_H
Andrew Trick1c246052010-10-22 23:09:15 +000039
Jakob Stoklund Olesen21914ab2013-08-14 17:28:42 +000040#include "llvm/CodeGen/LiveInterval.h"
Chandler Carruth802d7552012-12-04 07:12:27 +000041#include "llvm/CodeGen/RegisterClassInfo.h"
Andrew Trick1c246052010-10-22 23:09:15 +000042
43namespace llvm {
44
Andrew Trick84aef492010-10-26 18:34:01 +000045template<typename T> class SmallVectorImpl;
46class TargetRegisterInfo;
Andrew Trick1c246052010-10-22 23:09:15 +000047class VirtRegMap;
Andrew Trick84aef492010-10-26 18:34:01 +000048class LiveIntervals;
Jakob Stoklund Olesen03b87d52012-06-20 22:52:24 +000049class LiveRegMatrix;
Andrew Trick89eb6a82010-11-10 19:18:47 +000050class Spiller;
Andrew Trick84aef492010-10-26 18:34:01 +000051
Andrew Trick1c246052010-10-22 23:09:15 +000052/// RegAllocBase provides the register allocation driver and interface that can
53/// be extended to add interesting heuristics.
54///
Andrew Trickfce64c92010-11-30 23:18:47 +000055/// Register allocators must override the selectOrSplit() method to implement
Jakob Stoklund Olesen2329c542011-02-22 23:01:52 +000056/// live range splitting. They must also override enqueue/dequeue to provide an
57/// assignment order.
Benjamin Kramer079b96e2013-09-11 18:05:11 +000058class RegAllocBase {
Juergen Ributzkad12ccbd2013-11-19 00:57:56 +000059 virtual void anchor();
Jakob Stoklund Olesen20f19eb2012-01-11 23:19:08 +000060protected:
61 const TargetRegisterInfo *TRI;
62 MachineRegisterInfo *MRI;
63 VirtRegMap *VRM;
64 LiveIntervals *LIS;
Jakob Stoklund Olesen03b87d52012-06-20 22:52:24 +000065 LiveRegMatrix *Matrix;
Jakob Stoklund Olesen20f19eb2012-01-11 23:19:08 +000066 RegisterClassInfo RegClassInfo;
67
Wei Mi9a16d652016-04-13 03:08:27 +000068 /// Inst which is a def of an original reg and whose defs are already all
69 /// dead after remat is saved in DeadRemats. The deletion of such inst is
70 /// postponed till all the allocations are done, so its remat expr is
71 /// always available for the remat of all the siblings of the original reg.
72 SmallPtrSet<MachineInstr *, 32> DeadRemats;
73
Craig Topperada08572014-04-16 04:21:27 +000074 RegAllocBase()
75 : TRI(nullptr), MRI(nullptr), VRM(nullptr), LIS(nullptr), Matrix(nullptr) {}
Andrew Trick1c246052010-10-22 23:09:15 +000076
Andrew Tricke8719c52010-10-22 23:33:19 +000077 virtual ~RegAllocBase() {}
78
Andrew Trick1c246052010-10-22 23:09:15 +000079 // A RegAlloc pass should call this before allocatePhysRegs.
Jakob Stoklund Olesen2d2dec92012-06-20 22:52:29 +000080 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
Jakob Stoklund Olesen50215af2011-05-10 17:37:41 +000081
Andrew Trick84aef492010-10-26 18:34:01 +000082 // The top-level driver. The output is a VirtRegMap that us updated with
83 // physical register assignments.
Andrew Trick84aef492010-10-26 18:34:01 +000084 void allocatePhysRegs();
Andrew Trick1c246052010-10-22 23:09:15 +000085
Wei Mi9a16d652016-04-13 03:08:27 +000086 // Include spiller post optimization and removing dead defs left because of
87 // rematerialization.
88 virtual void postOptimization();
89
Andrew Trick89eb6a82010-11-10 19:18:47 +000090 // Get a temporary reference to a Spiller instance.
91 virtual Spiller &spiller() = 0;
Andrew Trickfce64c92010-11-30 23:18:47 +000092
Jakob Stoklund Olesen2329c542011-02-22 23:01:52 +000093 /// enqueue - Add VirtReg to the priority queue of unassigned registers.
94 virtual void enqueue(LiveInterval *LI) = 0;
95
96 /// dequeue - Return the next unassigned register, or NULL.
97 virtual LiveInterval *dequeue() = 0;
Jakob Stoklund Olesene0df7862010-12-08 22:22:41 +000098
Andrew Trick1c246052010-10-22 23:09:15 +000099 // A RegAlloc pass should override this to provide the allocation heuristics.
Andrew Trick84aef492010-10-26 18:34:01 +0000100 // Each call must guarantee forward progess by returning an available PhysReg
101 // or new set of split live virtual registers. It is up to the splitter to
Andrew Trick1c246052010-10-22 23:09:15 +0000102 // converge quickly toward fully spilled live ranges.
Andrew Trickfce64c92010-11-30 23:18:47 +0000103 virtual unsigned selectOrSplit(LiveInterval &VirtReg,
Mark Laceyf9ea8852013-08-14 23:50:04 +0000104 SmallVectorImpl<unsigned> &splitLVRs) = 0;
Andrew Trick1c246052010-10-22 23:09:15 +0000105
Jakob Stoklund Olesen92da7052010-12-11 00:19:56 +0000106 // Use this group name for NamedRegionTimer.
Craig Topper9fdc70e2013-07-17 03:11:32 +0000107 static const char TimerGroupName[];
Jakob Stoklund Olesen92da7052010-12-11 00:19:56 +0000108
Quentin Colombeta799e2e2015-01-08 01:16:39 +0000109 /// Method called when the allocator is about to remove a LiveInterval.
110 virtual void aboutToRemoveInterval(LiveInterval &LI) {}
111
Jakob Stoklund Olesen2e98ee32010-12-17 23:16:35 +0000112public:
113 /// VerifyEnabled - True when -verify-regalloc is given.
114 static bool VerifyEnabled;
115
Andrew Trickfce64c92010-11-30 23:18:47 +0000116private:
Jakob Stoklund Olesen2329c542011-02-22 23:01:52 +0000117 void seedLiveRegs();
Andrew Trick1c246052010-10-22 23:09:15 +0000118};
119
Andrew Trick1c246052010-10-22 23:09:15 +0000120} // end namespace llvm
121
Benjamin Kramera7c40ef2014-08-13 16:26:38 +0000122#endif