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gerrit-public.fairphone.software / toolchain / llvm-project / 01e5037fece0aed1cfb47ff7c604df29524e461d / . / llvm / test / CodeGen / ARM / fnmscs.ll
blob: 78ccb6095e0591f48134705e72b31eedefa93f18 [file] [log] [blame]
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]1; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
2; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NEON
Renato Golina4d56352013-03-21 21:30:49 +0000[diff] [blame]3; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8
4; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 -regalloc=basic | FileCheck %s -check-prefix=A8
5; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=A8U
6; RUN: llc < %s -mtriple=arm-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8U
David Goodwin3b9c52c2009-08-04 17:53:06 +0000[diff] [blame]7
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]8define float @t1(float %acc, float %a, float %b) nounwind {
David Goodwin3b9c52c2009-08-04 17:53:06 +0000[diff] [blame]9entry:
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]10; VFP2-LABEL: t1:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]11; VFP2: vnmla.f32
12
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]13; NEON-LABEL: t1:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]14; NEON: vnmla.f32
15
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]16; A8U-LABEL: t1:
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]17; A8U: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
18; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}}
19
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]20; A8-LABEL: t1:
Jakob Stoklund Olesen0888bcf2011-03-31 22:14:03 +0000[diff] [blame]21; A8: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]22; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
David Goodwin3b9c52c2009-08-04 17:53:06 +0000[diff] [blame]23 %0 = fmul float %a, %b
David Goodwin108b5222009-08-10 22:31:04 +0000[diff] [blame]24 %1 = fsub float -0.0, %0
David Goodwin3b9c52c2009-08-04 17:53:06 +0000[diff] [blame]25 %2 = fsub float %1, %acc
26 ret float %2
27}
28
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]29define float @t2(float %acc, float %a, float %b) nounwind {
David Goodwina2824d52009-08-04 18:11:59 +0000[diff] [blame]30entry:
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]31; VFP2-LABEL: t2:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]32; VFP2: vnmla.f32
33
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]34; NEON-LABEL: t2:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]35; NEON: vnmla.f32
36
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]37; A8U-LABEL: t2:
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]38; A8U: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}}
39; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}}
40
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]41; A8-LABEL: t2:
Evan Cheng93b5cdc2011-05-03 19:09:32 +0000[diff] [blame]42; A8: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}}
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]43; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
David Goodwina2824d52009-08-04 18:11:59 +0000[diff] [blame]44 %0 = fmul float %a, %b
45 %1 = fmul float -1.0, %0
46 %2 = fsub float %1, %acc
47 ret float %2
48}
49
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]50define double @t3(double %acc, double %a, double %b) nounwind {
51entry:
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]52; VFP2-LABEL: t3:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]53; VFP2: vnmla.f64
54
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]55; NEON-LABEL: t3:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]56; NEON: vnmla.f64
57
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]58; A8U-LABEL: t3:
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]59; A8U: vnmul.f64 d
60; A8U: vsub.f64 d
61
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]62; A8-LABEL: t3:
Jakob Stoklund Olesenac6cfa42013-01-19 00:03:32 +0000[diff] [blame]63; A8: vnmul.f64 d
64; A8: vsub.f64 d
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]65 %0 = fmul double %a, %b
66 %1 = fsub double -0.0, %0
67 %2 = fsub double %1, %acc
68 ret double %2
69}
70
71define double @t4(double %acc, double %a, double %b) nounwind {
72entry:
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]73; VFP2-LABEL: t4:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]74; VFP2: vnmla.f64
75
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]76; NEON-LABEL: t4:
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]77; NEON: vnmla.f64
78
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]79; A8U-LABEL: t4:
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]80; A8U: vnmul.f64 d
81; A8U: vsub.f64 d
82
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]83; A8-LABEL: t4:
Jakob Stoklund Olesenac6cfa42013-01-19 00:03:32 +0000[diff] [blame]84; A8: vnmul.f64 d
85; A8: vsub.f64 d
Evan Cheng2d59ee32010-11-12 20:32:20 +0000[diff] [blame]86 %0 = fmul double %a, %b
87 %1 = fmul double -1.0, %0
88 %2 = fsub double %1, %acc
89 ret double %2
90}