Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 1 | ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s |
| 2 | |
Vincent Lejeune | b55940c | 2013-07-09 15:03:11 +0000 | [diff] [blame] | 3 | ;CHECK: MULADD_IEEE * |
| 4 | ;CHECK: FRACT * |
| 5 | ;CHECK: ADD * |
Vincent Lejeune | 77a8352 | 2013-06-29 19:32:43 +0000 | [diff] [blame] | 6 | ;CHECK: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}} |
Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 7 | |
Vincent Lejeune | f143af3 | 2013-11-11 22:10:24 +0000 | [diff] [blame] | 8 | define void @test(<4 x float> inreg %reg0) #0 { |
| 9 | %r0 = extractelement <4 x float> %reg0, i32 0 |
Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 10 | %r1 = call float @llvm.sin.f32( float %r0) |
Vincent Lejeune | f143af3 | 2013-11-11 22:10:24 +0000 | [diff] [blame] | 11 | %vec = insertelement <4 x float> undef, float %r1, i32 0 |
| 12 | call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0) |
Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 13 | ret void |
| 14 | } |
| 15 | |
| 16 | declare float @llvm.sin.f32(float) readnone |
Vincent Lejeune | f143af3 | 2013-11-11 22:10:24 +0000 | [diff] [blame] | 17 | declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) |
Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 18 | |
Vincent Lejeune | f143af3 | 2013-11-11 22:10:24 +0000 | [diff] [blame] | 19 | attributes #0 = { "ShaderType"="0" } |