Aaron Watry | daabb20 | 2013-06-25 13:55:52 +0000 | [diff] [blame] | 1 | ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s |
Tom Stellard | 70f13db | 2013-10-10 17:11:46 +0000 | [diff] [blame] | 2 | ;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s |
Tom Stellard | 4489b85 | 2013-05-03 17:21:31 +0000 | [diff] [blame] | 3 | |
Aaron Watry | daabb20 | 2013-06-25 13:55:52 +0000 | [diff] [blame] | 4 | ;EG-CHECK: @xor_v2i32 |
Vincent Lejeune | 7e2c832 | 2013-09-04 19:53:46 +0000 | [diff] [blame] | 5 | ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |
| 6 | ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |
Tom Stellard | 4489b85 | 2013-05-03 17:21:31 +0000 | [diff] [blame] | 7 | |
Aaron Watry | daabb20 | 2013-06-25 13:55:52 +0000 | [diff] [blame] | 8 | ;SI-CHECK: @xor_v2i32 |
Matt Arsenault | 72b31ee | 2013-11-12 02:35:51 +0000 | [diff] [blame] | 9 | ;SI-CHECK: V_XOR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} |
| 10 | ;SI-CHECK: V_XOR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} |
Aaron Watry | daabb20 | 2013-06-25 13:55:52 +0000 | [diff] [blame] | 11 | |
| 12 | |
| 13 | define void @xor_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in0, <2 x i32> addrspace(1)* %in1) { |
| 14 | %a = load <2 x i32> addrspace(1) * %in0 |
| 15 | %b = load <2 x i32> addrspace(1) * %in1 |
| 16 | %result = xor <2 x i32> %a, %b |
| 17 | store <2 x i32> %result, <2 x i32> addrspace(1)* %out |
| 18 | ret void |
| 19 | } |
| 20 | |
| 21 | ;EG-CHECK: @xor_v4i32 |
Vincent Lejeune | 7e2c832 | 2013-09-04 19:53:46 +0000 | [diff] [blame] | 22 | ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |
| 23 | ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |
| 24 | ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |
| 25 | ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |
Aaron Watry | daabb20 | 2013-06-25 13:55:52 +0000 | [diff] [blame] | 26 | |
| 27 | ;SI-CHECK: @xor_v4i32 |
Matt Arsenault | 72b31ee | 2013-11-12 02:35:51 +0000 | [diff] [blame] | 28 | ;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}} |
| 29 | ;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}} |
| 30 | ;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}} |
| 31 | ;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}} |
Aaron Watry | daabb20 | 2013-06-25 13:55:52 +0000 | [diff] [blame] | 32 | |
| 33 | define void @xor_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in0, <4 x i32> addrspace(1)* %in1) { |
| 34 | %a = load <4 x i32> addrspace(1) * %in0 |
| 35 | %b = load <4 x i32> addrspace(1) * %in1 |
Tom Stellard | 4489b85 | 2013-05-03 17:21:31 +0000 | [diff] [blame] | 36 | %result = xor <4 x i32> %a, %b |
| 37 | store <4 x i32> %result, <4 x i32> addrspace(1)* %out |
| 38 | ret void |
| 39 | } |
Michel Danzer | 8522270 | 2013-08-16 16:19:31 +0000 | [diff] [blame] | 40 | |
| 41 | ;EG-CHECK: @xor_i1 |
Vincent Lejeune | 7e2c832 | 2013-09-04 19:53:46 +0000 | [diff] [blame] | 42 | ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], PS}} |
Michel Danzer | 8522270 | 2013-08-16 16:19:31 +0000 | [diff] [blame] | 43 | |
| 44 | ;SI-CHECK: @xor_i1 |
Matt Arsenault | 72b31ee | 2013-11-12 02:35:51 +0000 | [diff] [blame] | 45 | ;SI-CHECK: S_XOR_B64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}] |
Michel Danzer | 8522270 | 2013-08-16 16:19:31 +0000 | [diff] [blame] | 46 | |
| 47 | define void @xor_i1(float addrspace(1)* %out, float addrspace(1)* %in0, float addrspace(1)* %in1) { |
| 48 | %a = load float addrspace(1) * %in0 |
| 49 | %b = load float addrspace(1) * %in1 |
| 50 | %acmp = fcmp oge float %a, 0.000000e+00 |
| 51 | %bcmp = fcmp oge float %b, 0.000000e+00 |
| 52 | %xor = xor i1 %acmp, %bcmp |
| 53 | %result = select i1 %xor, float %a, float %b |
| 54 | store float %result, float addrspace(1)* %out |
| 55 | ret void |
| 56 | } |