blob: c12b0c1ce2c94ba288b1580bbd3ad607483246d0 [file] [log] [blame]
Aaron Watrydaabb202013-06-25 13:55:52 +00001;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
Tom Stellard70f13db2013-10-10 17:11:46 +00002;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
Tom Stellard4489b852013-05-03 17:21:31 +00003
Aaron Watrydaabb202013-06-25 13:55:52 +00004;EG-CHECK: @xor_v2i32
Vincent Lejeune7e2c8322013-09-04 19:53:46 +00005;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
6;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Tom Stellard4489b852013-05-03 17:21:31 +00007
Aaron Watrydaabb202013-06-25 13:55:52 +00008;SI-CHECK: @xor_v2i32
Matt Arsenault72b31ee2013-11-12 02:35:51 +00009;SI-CHECK: V_XOR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
10;SI-CHECK: V_XOR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
Aaron Watrydaabb202013-06-25 13:55:52 +000011
12
13define void @xor_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in0, <2 x i32> addrspace(1)* %in1) {
14 %a = load <2 x i32> addrspace(1) * %in0
15 %b = load <2 x i32> addrspace(1) * %in1
16 %result = xor <2 x i32> %a, %b
17 store <2 x i32> %result, <2 x i32> addrspace(1)* %out
18 ret void
19}
20
21;EG-CHECK: @xor_v4i32
Vincent Lejeune7e2c8322013-09-04 19:53:46 +000022;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
23;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
24;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
25;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Aaron Watrydaabb202013-06-25 13:55:52 +000026
27;SI-CHECK: @xor_v4i32
Matt Arsenault72b31ee2013-11-12 02:35:51 +000028;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}}
29;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}}
30;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}}
31;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}}
Aaron Watrydaabb202013-06-25 13:55:52 +000032
33define void @xor_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in0, <4 x i32> addrspace(1)* %in1) {
34 %a = load <4 x i32> addrspace(1) * %in0
35 %b = load <4 x i32> addrspace(1) * %in1
Tom Stellard4489b852013-05-03 17:21:31 +000036 %result = xor <4 x i32> %a, %b
37 store <4 x i32> %result, <4 x i32> addrspace(1)* %out
38 ret void
39}
Michel Danzer85222702013-08-16 16:19:31 +000040
41;EG-CHECK: @xor_i1
Vincent Lejeune7e2c8322013-09-04 19:53:46 +000042;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], PS}}
Michel Danzer85222702013-08-16 16:19:31 +000043
44;SI-CHECK: @xor_i1
Matt Arsenault72b31ee2013-11-12 02:35:51 +000045;SI-CHECK: S_XOR_B64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}]
Michel Danzer85222702013-08-16 16:19:31 +000046
47define void @xor_i1(float addrspace(1)* %out, float addrspace(1)* %in0, float addrspace(1)* %in1) {
48 %a = load float addrspace(1) * %in0
49 %b = load float addrspace(1) * %in1
50 %acmp = fcmp oge float %a, 0.000000e+00
51 %bcmp = fcmp oge float %b, 0.000000e+00
52 %xor = xor i1 %acmp, %bcmp
53 %result = select i1 %xor, float %a, float %b
54 store float %result, float addrspace(1)* %out
55 ret void
56}