Vasileios Kalintiris | 2ed214f | 2015-01-26 12:04:40 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ |
| 2 | ; RUN: -check-prefix=ALL -check-prefix=GP32 |
| 3 | ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ |
| 4 | ; RUN: -check-prefix=ALL -check-prefix=GP32 |
| 5 | ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ |
| 6 | ; RUN: -check-prefix=ALL -check-prefix=GP32 |
Daniel Sanders | 1779314 | 2015-02-18 16:24:50 +0000 | [diff] [blame] | 7 | ; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \ |
| 8 | ; RUN: -check-prefix=ALL -check-prefix=GP32 |
| 9 | ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \ |
| 10 | ; RUN: -check-prefix=ALL -check-prefix=GP32 |
Vasileios Kalintiris | 2ed214f | 2015-01-26 12:04:40 +0000 | [diff] [blame] | 11 | ; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ |
| 12 | ; RUN: -check-prefix=ALL -check-prefix=GP32 |
| 13 | ; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ |
| 14 | ; RUN: -check-prefix=ALL -check-prefix=GP64 |
| 15 | ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ |
| 16 | ; RUN: -check-prefix=ALL -check-prefix=GP64 |
| 17 | ; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ |
| 18 | ; RUN: -check-prefix=ALL -check-prefix=GP64 |
| 19 | ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ |
| 20 | ; RUN: -check-prefix=ALL -check-prefix=GP64 |
Daniel Sanders | 1779314 | 2015-02-18 16:24:50 +0000 | [diff] [blame] | 21 | ; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s \ |
| 22 | ; RUN: -check-prefix=ALL -check-prefix=GP64 |
| 23 | ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \ |
| 24 | ; RUN: -check-prefix=ALL -check-prefix=GP64 |
Vasileios Kalintiris | 2ed214f | 2015-01-26 12:04:40 +0000 | [diff] [blame] | 25 | ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ |
| 26 | ; RUN: -check-prefix=ALL -check-prefix=GP64 |
| 27 | |
| 28 | define signext i1 @or_i1(i1 signext %a, i1 signext %b) { |
| 29 | entry: |
| 30 | ; ALL-LABEL: or_i1: |
| 31 | |
| 32 | ; ALL: or $2, $4, $5 |
| 33 | |
| 34 | %r = or i1 %a, %b |
| 35 | ret i1 %r |
| 36 | } |
| 37 | |
| 38 | define signext i8 @or_i8(i8 signext %a, i8 signext %b) { |
| 39 | entry: |
| 40 | ; ALL-LABEL: or_i8: |
| 41 | |
| 42 | ; ALL: or $2, $4, $5 |
| 43 | |
| 44 | %r = or i8 %a, %b |
| 45 | ret i8 %r |
| 46 | } |
| 47 | |
| 48 | define signext i16 @or_i16(i16 signext %a, i16 signext %b) { |
| 49 | entry: |
| 50 | ; ALL-LABEL: or_i16: |
| 51 | |
| 52 | ; ALL: or $2, $4, $5 |
| 53 | |
| 54 | %r = or i16 %a, %b |
| 55 | ret i16 %r |
| 56 | } |
| 57 | |
| 58 | define signext i32 @or_i32(i32 signext %a, i32 signext %b) { |
| 59 | entry: |
| 60 | ; ALL-LABEL: or_i32: |
| 61 | |
Vasileios Kalintiris | 044e172 | 2015-08-04 14:26:35 +0000 | [diff] [blame^] | 62 | ; GP32: or $2, $4, $5 |
| 63 | |
| 64 | ; GP64: or $[[T0:[0-9]+]], $4, $5 |
| 65 | ; FIXME: The sll instruction below is redundant. |
| 66 | ; GP64: sll $2, $[[T0]], 0 |
Vasileios Kalintiris | 2ed214f | 2015-01-26 12:04:40 +0000 | [diff] [blame] | 67 | |
| 68 | %r = or i32 %a, %b |
| 69 | ret i32 %r |
| 70 | } |
| 71 | |
| 72 | define signext i64 @or_i64(i64 signext %a, i64 signext %b) { |
| 73 | entry: |
| 74 | ; ALL-LABEL: or_i64: |
| 75 | |
| 76 | ; GP32: or $2, $4, $6 |
| 77 | ; GP32: or $3, $5, $7 |
| 78 | |
| 79 | ; GP64: or $2, $4, $5 |
| 80 | |
| 81 | %r = or i64 %a, %b |
| 82 | ret i64 %r |
| 83 | } |
Vasileios Kalintiris | ef96a8e | 2015-01-26 12:33:22 +0000 | [diff] [blame] | 84 | |
| 85 | define signext i128 @or_i128(i128 signext %a, i128 signext %b) { |
| 86 | entry: |
| 87 | ; ALL-LABEL: or_i128: |
| 88 | |
| 89 | ; GP32: lw $[[T0:[0-9]+]], 24($sp) |
| 90 | ; GP32: lw $[[T1:[0-9]+]], 20($sp) |
| 91 | ; GP32: lw $[[T2:[0-9]+]], 16($sp) |
| 92 | ; GP32: or $2, $4, $[[T2]] |
| 93 | ; GP32: or $3, $5, $[[T1]] |
| 94 | ; GP32: or $4, $6, $[[T0]] |
| 95 | ; GP32: lw $[[T3:[0-9]+]], 28($sp) |
| 96 | ; GP32: or $5, $7, $[[T3]] |
| 97 | |
| 98 | ; GP64: or $2, $4, $6 |
| 99 | ; GP64: or $3, $5, $7 |
| 100 | |
| 101 | %r = or i128 %a, %b |
| 102 | ret i128 %r |
| 103 | } |