Krzysztof Parzyszek | 04c0796 | 2016-08-04 17:56:19 +0000 | [diff] [blame^] | 1 | ; RUN: llc -march=hexagon < %s | FileCheck %s |
| 2 | |
| 3 | ; Make sure we don't generate zxtb to transfer a predicate register into |
| 4 | ; a general purpose register. |
| 5 | |
| 6 | ; CHECK: r0 = p0 |
| 7 | ; CHECK-NOT: zxtb(p |
| 8 | |
| 9 | target triple = "hexagon" |
| 10 | |
| 11 | ; Function Attrs: nounwind |
| 12 | define i32 @fred() local_unnamed_addr #0 { |
| 13 | entry: |
| 14 | %0 = tail call i32 @llvm.hexagon.C4.and.and(i32 undef, i32 undef, i32 undef) |
| 15 | ret i32 %0 |
| 16 | } |
| 17 | |
| 18 | declare i32 @llvm.hexagon.C4.and.and(i32, i32, i32) #1 |
| 19 | |
| 20 | attributes #0 = { nounwind "target-cpu"="hexagonv5" } |
| 21 | attributes #1 = { nounwind readnone } |