Hsiangkai Wang | 04ddf39 | 2019-06-12 03:04:22 +0000 | [diff] [blame^] | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| 2 | ; RUN: llc -mtriple=riscv32 < %s | FileCheck -check-prefix=RV32 %s |
| 3 | ; RUN: llc -mtriple=riscv64 < %s | FileCheck -check-prefix=RV64 %s |
| 4 | |
| 5 | define void @foo(i32 signext %size) { |
| 6 | ; RV32-LABEL: foo: |
| 7 | ; RV32: # %bb.0: # %entry |
| 8 | ; RV32-NEXT: addi sp, sp, -16 |
| 9 | ; RV32-NEXT: .cfi_def_cfa_offset 16 |
| 10 | ; RV32-NEXT: sw ra, 12(sp) |
| 11 | ; RV32-NEXT: sw s0, 8(sp) |
| 12 | ; RV32-NEXT: .cfi_offset ra, -4 |
| 13 | ; RV32-NEXT: .cfi_offset s0, -8 |
| 14 | ; RV32-NEXT: addi s0, sp, 16 |
| 15 | ; RV32-NEXT: .cfi_def_cfa s0, 0 |
| 16 | ; RV32-NEXT: addi a0, a0, 15 |
| 17 | ; RV32-NEXT: andi a0, a0, -16 |
| 18 | ; RV32-NEXT: sub a0, sp, a0 |
| 19 | ; RV32-NEXT: mv sp, a0 |
| 20 | ; RV32-NEXT: call bar |
| 21 | ; RV32-NEXT: addi sp, s0, -16 |
| 22 | ; RV32-NEXT: lw s0, 8(sp) |
| 23 | ; RV32-NEXT: .cfi_def_cfa sp, 16 |
| 24 | ; RV32-NEXT: lw ra, 12(sp) |
| 25 | ; RV32-NEXT: .cfi_restore ra |
| 26 | ; RV32-NEXT: .cfi_restore s0 |
| 27 | ; RV32-NEXT: addi sp, sp, 16 |
| 28 | ; RV32-NEXT: .cfi_def_cfa_offset 0 |
| 29 | ; RV32-NEXT: ret |
| 30 | ; |
| 31 | ; RV64-LABEL: foo: |
| 32 | ; RV64: # %bb.0: # %entry |
| 33 | ; RV64-NEXT: addi sp, sp, -16 |
| 34 | ; RV64-NEXT: .cfi_def_cfa_offset 16 |
| 35 | ; RV64-NEXT: sd ra, 8(sp) |
| 36 | ; RV64-NEXT: sd s0, 0(sp) |
| 37 | ; RV64-NEXT: .cfi_offset ra, -8 |
| 38 | ; RV64-NEXT: .cfi_offset s0, -16 |
| 39 | ; RV64-NEXT: addi s0, sp, 16 |
| 40 | ; RV64-NEXT: .cfi_def_cfa s0, 0 |
| 41 | ; RV64-NEXT: addi a1, zero, 1 |
| 42 | ; RV64-NEXT: slli a1, a1, 33 |
| 43 | ; RV64-NEXT: addi a1, a1, -16 |
| 44 | ; RV64-NEXT: slli a0, a0, 32 |
| 45 | ; RV64-NEXT: srli a0, a0, 32 |
| 46 | ; RV64-NEXT: addi a0, a0, 15 |
| 47 | ; RV64-NEXT: and a0, a0, a1 |
| 48 | ; RV64-NEXT: sub a0, sp, a0 |
| 49 | ; RV64-NEXT: mv sp, a0 |
| 50 | ; RV64-NEXT: call bar |
| 51 | ; RV64-NEXT: addi sp, s0, -16 |
| 52 | ; RV64-NEXT: ld s0, 0(sp) |
| 53 | ; RV64-NEXT: .cfi_def_cfa sp, 16 |
| 54 | ; RV64-NEXT: ld ra, 8(sp) |
| 55 | ; RV64-NEXT: .cfi_restore ra |
| 56 | ; RV64-NEXT: .cfi_restore s0 |
| 57 | ; RV64-NEXT: addi sp, sp, 16 |
| 58 | ; RV64-NEXT: .cfi_def_cfa_offset 0 |
| 59 | ; RV64-NEXT: ret |
| 60 | entry: |
| 61 | %0 = alloca i8, i32 %size, align 16 |
| 62 | call void @bar(i8* nonnull %0) #2 |
| 63 | ret void |
| 64 | } |
| 65 | |
| 66 | declare void @bar(i8*) |