blob: dfc3fc13d9361c27ed42855693ea16570b2dc1a2 [file] [log] [blame]
Matt Davisdea343d2018-06-25 16:53:00 +00001//===--------------------- Pipeline.h ---------------------------*- C++ -*-===//
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10///
Matt Davisdea343d2018-06-25 16:53:00 +000011/// This file implements an ordered container of stages that simulate the
12/// pipeline of a hardware backend.
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000013///
14//===----------------------------------------------------------------------===//
15
Matt Davisdea343d2018-06-25 16:53:00 +000016#ifndef LLVM_TOOLS_LLVM_MCA_PIPELINE_H
17#define LLVM_TOOLS_LLVM_MCA_PIPELINE_H
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000018
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000019#include "Scheduler.h"
Matt Davis43de6db2018-06-22 16:17:26 +000020#include "Stage.h"
21#include "llvm/ADT/SmallVector.h"
Matt Davis4bcf3692018-08-13 18:11:48 +000022#include "llvm/Support/Error.h"
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000023
24namespace mca {
25
Andrea Di Biagio3db1fd92018-03-08 16:34:19 +000026class HWEventListener;
Clement Courbet844f22d2018-03-13 13:11:01 +000027class HWInstructionEvent;
Andrea Di Biagio91ab2ee2018-03-19 13:23:07 +000028class HWStallEvent;
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000029
Matt Davisdea343d2018-06-25 16:53:00 +000030/// A pipeline for a specific subtarget.
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000031///
32/// It emulates an out-of-order execution of instructions. Instructions are
Matt Davis5d1cda12018-05-15 20:21:04 +000033/// fetched from a MCInst sequence managed by an initial 'Fetch' stage.
34/// Instructions are firstly fetched, then dispatched to the schedulers, and
35/// then executed.
36///
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000037/// This class tracks the lifetime of an instruction from the moment where
38/// it gets dispatched to the schedulers, to the moment where it finishes
39/// executing and register writes are architecturally committed.
40/// In particular, it monitors changes in the state of every instruction
41/// in flight.
Matt Davis5d1cda12018-05-15 20:21:04 +000042///
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000043/// Instructions are executed in a loop of iterations. The number of iterations
Matt Davis5d1cda12018-05-15 20:21:04 +000044/// is defined by the SourceMgr object, which is managed by the initial stage
45/// of the instruction pipeline.
46///
Matt Davisdea343d2018-06-25 16:53:00 +000047/// The Pipeline entry point is method 'run()' which executes cycles in a loop
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000048/// until there are new instructions to dispatch, and not every instruction
49/// has been retired.
Matt Davis5d1cda12018-05-15 20:21:04 +000050///
Matt Davisdea343d2018-06-25 16:53:00 +000051/// Internally, the Pipeline collects statistical information in the form of
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000052/// histograms. For example, it tracks how the dispatch group size changes
53/// over time.
Matt Davisdea343d2018-06-25 16:53:00 +000054class Pipeline {
Matt Davis8238def2018-06-28 17:33:24 +000055 Pipeline(const Pipeline &P) = delete;
56 Pipeline &operator=(const Pipeline &P) = delete;
57
Matt Davisdea343d2018-06-25 16:53:00 +000058 /// An ordered list of stages that define this instruction pipeline.
Matt Davis43de6db2018-06-22 16:17:26 +000059 llvm::SmallVector<std::unique_ptr<Stage>, 8> Stages;
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000060 std::set<HWEventListener *> Listeners;
Matt Davis5d1cda12018-05-15 20:21:04 +000061 unsigned Cycles;
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000062
Matt Davis4bcf3692018-08-13 18:11:48 +000063 llvm::Error runCycle();
Matt Davis43de6db2018-06-22 16:17:26 +000064 bool hasWorkToProcess();
Andrea Di Biagioef6b8a32018-07-13 09:27:34 +000065 void notifyCycleBegin();
66 void notifyCycleEnd();
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000067
68public:
Andrea Di Biagio4335b3e2018-07-13 09:31:02 +000069 Pipeline() : Cycles(0) {}
Andrea Di Biagiodb630882018-08-16 19:00:48 +000070 void appendStage(std::unique_ptr<Stage> S);
Matt Davis4bcf3692018-08-13 18:11:48 +000071 llvm::Error run();
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000072 void addEventListener(HWEventListener *Listener);
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000073};
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000074} // namespace mca
75
Matt Davisdea343d2018-06-25 16:53:00 +000076#endif // LLVM_TOOLS_LLVM_MCA_PIPELINE_H