| Saleem Abdulrasool | 071a099 | 2016-03-17 14:10:49 +0000 | [diff] [blame^] | 1 | ; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-DIV |
| 2 | |
| 3 | ; int f(int n, int d) { |
| 4 | ; if (n / d) |
| 5 | ; return 1; |
| 6 | ; return 0; |
| 7 | ; } |
| 8 | |
| 9 | define arm_aapcs_vfpcc i32 @f(i32 %n, i32 %d) { |
| 10 | entry: |
| 11 | %retval = alloca i32, align 4 |
| 12 | %n.addr = alloca i32, align 4 |
| 13 | %d.addr = alloca i32, align 4 |
| 14 | store i32 %n, i32* %n.addr, align 4 |
| 15 | store i32 %d, i32* %d.addr, align 4 |
| 16 | %0 = load i32, i32* %n.addr, align 4 |
| 17 | %1 = load i32, i32* %d.addr, align 4 |
| 18 | %div = sdiv i32 %0, %1 |
| 19 | %tobool = icmp ne i32 %div, 0 |
| 20 | br i1 %tobool, label %if.then, label %if.end |
| 21 | |
| 22 | if.then: |
| 23 | store i32 1, i32* %retval, align 4 |
| 24 | br label %return |
| 25 | |
| 26 | if.end: |
| 27 | store i32 0, i32* %retval, align 4 |
| 28 | br label %return |
| 29 | |
| 30 | return: |
| 31 | %2 = load i32, i32* %retval, align 4 |
| 32 | ret i32 %2 |
| 33 | } |
| 34 | |
| 35 | ; CHECK-DIV-DAG: BB#0 |
| 36 | ; CHECK-DIV-DAG: Successors according to CFG: BB#5({{.*}}) BB#4 |
| 37 | ; CHECK-DIV-DAG: BB#1 |
| 38 | ; CHECK-DIV-DAG: Successors according to CFG: BB#3 |
| 39 | ; CHECK-DIV-DAG: BB#2 |
| 40 | ; CHECK-DIV-DAG: Successors according to CFG: BB#3 |
| 41 | ; CHECK-DIV-DAG: BB#3 |
| 42 | ; CHECK-DIV-DAG: BB#4 |
| 43 | ; CHECK-DIV-DAG: Successors according to CFG: BB#1({{.*}}) BB#2 |
| 44 | ; CHECK-DIV-DAG: BB#5 |
| 45 | |
| 46 | ; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-MOD |
| 47 | |
| 48 | ; int r; |
| 49 | ; int g(int l, int m) { |
| 50 | ; if (m <= 0) |
| 51 | ; return 0; |
| 52 | ; return (r = l % m); |
| 53 | ; } |
| 54 | |
| 55 | @r = common global i32 0, align 4 |
| 56 | |
| 57 | define arm_aapcs_vfpcc i32 @g(i32 %l, i32 %m) { |
| 58 | entry: |
| 59 | %cmp = icmp eq i32 %m, 0 |
| 60 | br i1 %cmp, label %return, label %if.end |
| 61 | |
| 62 | if.end: |
| 63 | %rem = urem i32 %l, %m |
| 64 | store i32 %rem, i32* @r, align 4 |
| 65 | br label %return |
| 66 | |
| 67 | return: |
| 68 | %retval.0 = phi i32 [ %rem, %if.end ], [ 0, %entry ] |
| 69 | ret i32 %retval.0 |
| 70 | } |
| 71 | |
| 72 | ; CHECK-MOD-DAG: BB#0 |
| 73 | ; CHECK-MOD-DAG: Successors according to CFG: BB#2({{.*}}) BB#1 |
| 74 | ; CHECK-MOD-DAG: BB#1 |
| 75 | ; CHECK-MOD-DAG: Successors according to CFG: BB#4({{.*}}) BB#3 |
| 76 | ; CHECK-MOD-DAG: BB#2 |
| 77 | ; CHECK-MOD-DAG: BB#3 |
| 78 | ; CHECK-MOD-DAG: Successors according to CFG: BB#2 |
| 79 | ; CHECK-MOD-DAG: BB#4 |
| 80 | |