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Andrea Di Biagio821f6502018-04-10 14:55:14 +00001//===--------------------- DispatchStatistics.h -----------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10///
11/// This file implements a view that prints a few statistics related to the
12/// dispatch logic. It collects and analyzes instruction dispatch events as
13/// well as static/dynamic dispatch stall events.
14///
15/// Example:
16/// ========
17///
18/// Dynamic Dispatch Stall Cycles:
19/// RAT - Register unavailable: 0
20/// RCU - Retire tokens unavailable: 0
21/// SCHEDQ - Scheduler full: 42
22/// LQ - Load queue full: 0
23/// SQ - Store queue full: 0
24/// GROUP - Static restrictions on the dispatch group: 0
25///
26///
27/// Dispatch Logic - number of cycles where we saw N instructions dispatched:
28/// [# dispatched], [# cycles]
29/// 0, 15 (11.5%)
30/// 2, 4 (3.1%)
31///
32//===----------------------------------------------------------------------===//
33
34#ifndef LLVM_TOOLS_LLVM_MCA_DISPATCHVIEW_H
35#define LLVM_TOOLS_LLVM_MCA_DISPATCHVIEW_H
36
37#include "View.h"
38#include "llvm/ADT/DenseMap.h"
39#include "llvm/ADT/SmallVector.h"
40#include "llvm/MC/MCSubtargetInfo.h"
41
42namespace mca {
43
44class DispatchStatistics : public View {
Andrea Di Biagio821f6502018-04-10 14:55:14 +000045 unsigned NumDispatched;
46 unsigned NumCycles;
47
48 // Counts dispatch stall events caused by unavailability of resources. There
49 // is one counter for every generic stall kind (see class HWStallEvent).
50 llvm::SmallVector<unsigned, 8> HWStalls;
51
Andrea Di Biagio074ff7c2018-04-11 12:31:44 +000052 using Histogram = llvm::DenseMap<unsigned, unsigned>;
53 Histogram DispatchGroupSizePerCycle;
54
Andrea Di Biagio821f6502018-04-10 14:55:14 +000055 void updateHistograms() {
56 DispatchGroupSizePerCycle[NumDispatched]++;
57 NumDispatched = 0;
58 }
59
60 void printDispatchHistogram(llvm::raw_ostream &OS) const;
61
62 void printDispatchStalls(llvm::raw_ostream &OS) const;
Andrea Di Biagio821f6502018-04-10 14:55:14 +000063
64public:
Andrea Di Biagio074ff7c2018-04-11 12:31:44 +000065 DispatchStatistics() : NumDispatched(0), NumCycles(0),
Andrea Di Biagio821f6502018-04-10 14:55:14 +000066 HWStalls(HWStallEvent::LastGenericEvent) {}
67
68 void onInstructionEvent(const HWInstructionEvent &Event) override;
69
70 void onCycleBegin(unsigned Cycle) override { NumCycles++; }
71
72 void onCycleEnd(unsigned Cycle) override { updateHistograms(); }
73
Andrea Di Biagio074ff7c2018-04-11 12:31:44 +000074 void onStallEvent(const HWStallEvent &Event) override;
Andrea Di Biagio821f6502018-04-10 14:55:14 +000075
76 void printView(llvm::raw_ostream &OS) const override {
77 printDispatchStalls(OS);
78 printDispatchHistogram(OS);
79 }
80};
81} // namespace mca
82
83#endif