Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 0945959869dfc7c8ef13c2eecc55c6d5f260c1d2 / . / llvm / test / CodeGen / X86 / pow.ll
blob: 0ae4a929ea857f25bdfba6ef257070cbab2cceb2 [file] [log] [blame]
Sanjay Patel09459592018-09-03 22:11:47 +0000[diff] [blame^]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
3
4declare float @llvm.pow.f32(float, float)
5declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)
6
7declare double @llvm.pow.f64(double, double)
8declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>)
9
10define float @pow_f32_one_fourth_fmf(float %x) nounwind {
11; CHECK-LABEL: pow_f32_one_fourth_fmf:
12; CHECK: # %bb.0:
13; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
14; CHECK-NEXT: jmp powf # TAILCALL
15 %r = call nsz ninf afn float @llvm.pow.f32(float %x, float 2.5e-01)
16 ret float %r
17}
18
19define double @pow_f64_one_fourth_fmf(double %x) nounwind {
20; CHECK-LABEL: pow_f64_one_fourth_fmf:
21; CHECK: # %bb.0:
22; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
23; CHECK-NEXT: jmp pow # TAILCALL
24 %r = call nsz ninf afn double @llvm.pow.f64(double %x, double 2.5e-01)
25 ret double %r
26}
27
28define <4 x float> @pow_v4f32_one_fourth_fmf(<4 x float> %x) nounwind {
29; CHECK-LABEL: pow_v4f32_one_fourth_fmf:
30; CHECK: # %bb.0:
31; CHECK-NEXT: subq $56, %rsp
32; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
33; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
34; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
35; CHECK-NEXT: callq powf
36; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
37; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
38; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
39; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
40; CHECK-NEXT: callq powf
41; CHECK-NEXT: unpcklps (%rsp), %xmm0 # 16-byte Folded Reload
42; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
43; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
44; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
45; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
46; CHECK-NEXT: callq powf
47; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
48; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
49; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,2,3]
50; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
51; CHECK-NEXT: callq powf
52; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
53; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
54; CHECK-NEXT: unpcklpd (%rsp), %xmm1 # 16-byte Folded Reload
55; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
56; CHECK-NEXT: movaps %xmm1, %xmm0
57; CHECK-NEXT: addq $56, %rsp
58; CHECK-NEXT: retq
59 %r = call fast <4 x float> @llvm.pow.v4f32(<4 x float> %x, <4 x float> <float 2.5e-1, float 2.5e-1, float 2.5e-01, float 2.5e-01>)
60 ret <4 x float> %r
61}
62
63define <2 x double> @pow_v2f64_one_fourth_fmf(<2 x double> %x) nounwind {
64; CHECK-LABEL: pow_v2f64_one_fourth_fmf:
65; CHECK: # %bb.0:
66; CHECK-NEXT: subq $40, %rsp
67; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
68; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
69; CHECK-NEXT: callq pow
70; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
71; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
72; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
73; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
74; CHECK-NEXT: callq pow
75; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
76; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
77; CHECK-NEXT: movaps %xmm1, %xmm0
78; CHECK-NEXT: addq $40, %rsp
79; CHECK-NEXT: retq
80 %r = call fast <2 x double> @llvm.pow.v2f64(<2 x double> %x, <2 x double> <double 2.5e-1, double 2.5e-1>)
81 ret <2 x double> %r
82}
83
84define float @pow_f32_one_fourth_not_enough_fmf(float %x) nounwind {
85; CHECK-LABEL: pow_f32_one_fourth_not_enough_fmf:
86; CHECK: # %bb.0:
87; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
88; CHECK-NEXT: jmp powf # TAILCALL
89 %r = call afn ninf float @llvm.pow.f32(float %x, float 2.5e-01)
90 ret float %r
91}
92
93define double @pow_f64_one_fourth_not_enough_fmf(double %x) nounwind {
94; CHECK-LABEL: pow_f64_one_fourth_not_enough_fmf:
95; CHECK: # %bb.0:
96; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
97; CHECK-NEXT: jmp pow # TAILCALL
98 %r = call nsz ninf double @llvm.pow.f64(double %x, double 2.5e-01)
99 ret double %r
100}
101
102define <4 x float> @pow_v4f32_one_fourth_not_enough_fmf(<4 x float> %x) nounwind {
103; CHECK-LABEL: pow_v4f32_one_fourth_not_enough_fmf:
104; CHECK: # %bb.0:
105; CHECK-NEXT: subq $56, %rsp
106; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
107; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
108; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
109; CHECK-NEXT: callq powf
110; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
111; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
112; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
113; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
114; CHECK-NEXT: callq powf
115; CHECK-NEXT: unpcklps (%rsp), %xmm0 # 16-byte Folded Reload
116; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
117; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
118; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
119; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
120; CHECK-NEXT: callq powf
121; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
122; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
123; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,2,3]
124; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
125; CHECK-NEXT: callq powf
126; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
127; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
128; CHECK-NEXT: unpcklpd (%rsp), %xmm1 # 16-byte Folded Reload
129; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
130; CHECK-NEXT: movaps %xmm1, %xmm0
131; CHECK-NEXT: addq $56, %rsp
132; CHECK-NEXT: retq
133 %r = call afn nsz <4 x float> @llvm.pow.v4f32(<4 x float> %x, <4 x float> <float 2.5e-1, float 2.5e-1, float 2.5e-01, float 2.5e-01>)
134 ret <4 x float> %r
135}
136
137define <2 x double> @pow_v2f64_one_fourth_not_enough_fmf(<2 x double> %x) nounwind {
138; CHECK-LABEL: pow_v2f64_one_fourth_not_enough_fmf:
139; CHECK: # %bb.0:
140; CHECK-NEXT: subq $40, %rsp
141; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
142; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
143; CHECK-NEXT: callq pow
144; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
145; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
146; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
147; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
148; CHECK-NEXT: callq pow
149; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
150; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
151; CHECK-NEXT: movaps %xmm1, %xmm0
152; CHECK-NEXT: addq $40, %rsp
153; CHECK-NEXT: retq
154 %r = call nsz nnan reassoc <2 x double> @llvm.pow.v2f64(<2 x double> %x, <2 x double> <double 2.5e-1, double 2.5e-1>)
155 ret <2 x double> %r
156}
157