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Dan Gohmanc24cd012008-09-17 00:43:24 +00001//===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This is an extremely simple MachineInstr-level dead-code-elimination pass.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/CodeGen/Passes.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000015#include "llvm/ADT/Statistic.h"
Dan Gohmanc24cd012008-09-17 00:43:24 +000016#include "llvm/CodeGen/MachineFunctionPass.h"
17#include "llvm/CodeGen/MachineRegisterInfo.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000018#include "llvm/Pass.h"
Dan Gohmanb873aa62008-09-25 01:06:50 +000019#include "llvm/Support/Debug.h"
Bill Wendlingb4471732009-08-22 20:04:03 +000020#include "llvm/Support/raw_ostream.h"
Dan Gohmanc24cd012008-09-17 00:43:24 +000021#include "llvm/Target/TargetInstrInfo.h"
Eric Christopherd9134482014-08-04 21:25:23 +000022#include "llvm/Target/TargetSubtargetInfo.h"
23
Dan Gohmanc24cd012008-09-17 00:43:24 +000024using namespace llvm;
25
Chandler Carruth1b9dde02014-04-22 02:02:50 +000026#define DEBUG_TYPE "codegen-dce"
27
Evan Chengea5c6be2010-02-06 09:07:11 +000028STATISTIC(NumDeletes, "Number of dead instructions deleted");
29
Dan Gohmanc24cd012008-09-17 00:43:24 +000030namespace {
Nick Lewycky02d5f772009-10-25 06:33:48 +000031 class DeadMachineInstructionElim : public MachineFunctionPass {
Craig Topper4584cd52014-03-07 09:26:03 +000032 bool runOnMachineFunction(MachineFunction &MF) override;
Andrew Trick9e761992012-02-08 21:22:43 +000033
Dan Gohman6b33aa42008-09-24 00:27:38 +000034 const TargetRegisterInfo *TRI;
35 const MachineRegisterInfo *MRI;
36 const TargetInstrInfo *TII;
37 BitVector LivePhysRegs;
38
Dan Gohmanc24cd012008-09-17 00:43:24 +000039 public:
40 static char ID; // Pass identification, replacement for typeid
Owen Anderson6c18d1a2010-10-19 17:21:58 +000041 DeadMachineInstructionElim() : MachineFunctionPass(ID) {
42 initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
43 }
Dan Gohman6b33aa42008-09-24 00:27:38 +000044
Matt Arsenault6b3e2122016-06-21 23:01:17 +000045 void getAnalysisUsage(AnalysisUsage &AU) const override {
46 AU.setPreservesCFG();
47 MachineFunctionPass::getAnalysisUsage(AU);
48 }
49
Dan Gohman6b33aa42008-09-24 00:27:38 +000050 private:
Dan Gohmane02f9ba2009-08-11 15:13:43 +000051 bool isDead(const MachineInstr *MI) const;
Dan Gohmanc24cd012008-09-17 00:43:24 +000052 };
Alexander Kornienkof00654e2015-06-23 09:49:53 +000053}
Dan Gohmanc24cd012008-09-17 00:43:24 +000054char DeadMachineInstructionElim::ID = 0;
Andrew Trick1fa5bcb2012-02-08 21:23:13 +000055char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
Dan Gohmanc24cd012008-09-17 00:43:24 +000056
Owen Andersona57b97e2010-07-21 22:09:45 +000057INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
Owen Andersondf7a4f22010-10-07 22:25:06 +000058 "Remove dead machine instructions", false, false)
Dan Gohmanc24cd012008-09-17 00:43:24 +000059
Dan Gohmane02f9ba2009-08-11 15:13:43 +000060bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
Evan Cheng6eb516d2011-01-07 23:50:32 +000061 // Technically speaking inline asm without side effects and no defs can still
62 // be deleted. But there is so much bad inline asm code out there, we should
63 // let them be.
64 if (MI->isInlineAsm())
65 return false;
66
Reid Klecknere9b89312015-01-13 00:48:10 +000067 // Don't delete frame allocation labels.
Reid Kleckner60381792015-07-07 22:25:32 +000068 if (MI->getOpcode() == TargetOpcode::LOCAL_ESCAPE)
Reid Klecknere9b89312015-01-13 00:48:10 +000069 return false;
70
Dan Gohman6b33aa42008-09-24 00:27:38 +000071 // Don't delete instructions with side effects.
72 bool SawStore = false;
Matthias Braun07066cc2015-05-19 21:22:20 +000073 if (!MI->isSafeToMove(nullptr, SawStore) && !MI->isPHI())
Dan Gohman6b33aa42008-09-24 00:27:38 +000074 return false;
75
76 // Examine each operand.
77 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
78 const MachineOperand &MO = MI->getOperand(i);
Dan Gohman0d1e9a82008-10-03 15:45:36 +000079 if (MO.isReg() && MO.isDef()) {
Dan Gohman6b33aa42008-09-24 00:27:38 +000080 unsigned Reg = MO.getReg();
Jakob Stoklund Olesen5d332912012-02-09 00:15:39 +000081 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
82 // Don't delete live physreg defs, or any reserved register defs.
Jakob Stoklund Olesenc30a9af2012-10-15 21:57:41 +000083 if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
Jakob Stoklund Olesen5d332912012-02-09 00:15:39 +000084 return false;
85 } else {
86 if (!MRI->use_nodbg_empty(Reg))
87 // This def has a non-debug use. Don't delete the instruction!
88 return false;
Dan Gohman6b33aa42008-09-24 00:27:38 +000089 }
90 }
91 }
92
93 // If there are no defs with uses, the instruction is dead.
94 return true;
95}
96
Dan Gohmanc24cd012008-09-17 00:43:24 +000097bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
Andrew Kayloraa641a52016-04-22 22:06:11 +000098 if (skipFunction(*MF.getFunction()))
Paul Robinson7c99ec52014-03-31 17:43:35 +000099 return false;
100
Dan Gohmanc24cd012008-09-17 00:43:24 +0000101 bool AnyChanges = false;
Dan Gohman6b33aa42008-09-24 00:27:38 +0000102 MRI = &MF.getRegInfo();
Eric Christopherfc6de422014-08-05 02:39:49 +0000103 TRI = MF.getSubtarget().getRegisterInfo();
104 TII = MF.getSubtarget().getInstrInfo();
Dan Gohmanc24cd012008-09-17 00:43:24 +0000105
106 // Loop over all instructions in all blocks, from bottom to top, so that it's
107 // more likely that chains of dependent but ultimately dead instructions will
108 // be cleaned up.
Pete Cooper7679afd2015-07-24 21:13:43 +0000109 for (MachineBasicBlock &MBB : make_range(MF.rbegin(), MF.rend())) {
Jakob Stoklund Olesen7993dae72010-08-31 21:51:05 +0000110 // Start out assuming that reserved registers are live out of this block.
Jakob Stoklund Olesenc30a9af2012-10-15 21:57:41 +0000111 LivePhysRegs = MRI->getReservedRegs();
Dan Gohman269999c2008-09-23 21:40:44 +0000112
Jakob Stoklund Olesen79f1b712011-06-27 15:00:36 +0000113 // Add live-ins from sucessors to LivePhysRegs. Normally, physregs are not
114 // live across blocks, but some targets (x86) can have flags live out of a
115 // block.
Pete Cooper7679afd2015-07-24 21:13:43 +0000116 for (MachineBasicBlock::succ_iterator S = MBB.succ_begin(),
117 E = MBB.succ_end(); S != E; S++)
Matthias Braund9da1622015-09-09 18:08:03 +0000118 for (const auto &LI : (*S)->liveins())
119 LivePhysRegs.set(LI.PhysReg);
Jakob Stoklund Olesen7993dae72010-08-31 21:51:05 +0000120
Dan Gohman269999c2008-09-23 21:40:44 +0000121 // Now scan the instructions and delete dead ones, tracking physreg
122 // liveness as we go.
Pete Cooper7679afd2015-07-24 21:13:43 +0000123 for (MachineBasicBlock::reverse_iterator MII = MBB.rbegin(),
124 MIE = MBB.rend(); MII != MIE; ) {
Duncan P. N. Exon Smith18720962016-09-11 18:51:28 +0000125 MachineInstr *MI = &*MII++;
Dan Gohmanc24cd012008-09-17 00:43:24 +0000126
Dan Gohman6b33aa42008-09-24 00:27:38 +0000127 // If the instruction is dead, delete it!
128 if (isDead(MI)) {
David Greene7af1efc2010-01-04 19:10:20 +0000129 DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << *MI);
Dale Johannesen30d99f42010-02-12 18:40:17 +0000130 // It is possible that some DBG_VALUE instructions refer to this
Gerolf Hoflehnercaa8bfd2014-08-13 21:15:23 +0000131 // instruction. They get marked as undef and will be deleted
132 // in the live debug variable analysis.
133 MI->eraseFromParentAndMarkDBGValuesForRemoval();
Dan Gohman6b33aa42008-09-24 00:27:38 +0000134 AnyChanges = true;
Evan Chengea5c6be2010-02-06 09:07:11 +0000135 ++NumDeletes;
Dan Gohman6b33aa42008-09-24 00:27:38 +0000136 continue;
Dan Gohmanc24cd012008-09-17 00:43:24 +0000137 }
Dan Gohman269999c2008-09-23 21:40:44 +0000138
139 // Record the physreg defs.
140 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
141 const MachineOperand &MO = MI->getOperand(i);
Dan Gohman0d1e9a82008-10-03 15:45:36 +0000142 if (MO.isReg() && MO.isDef()) {
Dan Gohman269999c2008-09-23 21:40:44 +0000143 unsigned Reg = MO.getReg();
Jakob Stoklund Olesen2fb5b312011-01-10 02:58:51 +0000144 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
Dan Gohmanbf293c42008-10-16 00:11:23 +0000145 // Check the subreg set, not the alias set, because a def
146 // of a super-register may still be partially live after
147 // this def.
Chad Rosierabdb1d62013-05-22 23:17:36 +0000148 for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true);
149 SR.isValid(); ++SR)
Jakob Stoklund Olesen54038d72012-06-01 23:28:30 +0000150 LivePhysRegs.reset(*SR);
Dan Gohman269999c2008-09-23 21:40:44 +0000151 }
Jakob Stoklund Olesen58614f22012-01-20 22:27:09 +0000152 } else if (MO.isRegMask()) {
153 // Register mask of preserved registers. All clobbers are dead.
Jakob Stoklund Olesen5e1ac452012-02-02 23:52:57 +0000154 LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
Dan Gohman269999c2008-09-23 21:40:44 +0000155 }
156 }
157 // Record the physreg uses, after the defs, in case a physreg is
158 // both defined and used in the same instruction.
159 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
160 const MachineOperand &MO = MI->getOperand(i);
Dan Gohman0d1e9a82008-10-03 15:45:36 +0000161 if (MO.isReg() && MO.isUse()) {
Dan Gohman269999c2008-09-23 21:40:44 +0000162 unsigned Reg = MO.getReg();
Jakob Stoklund Olesen2fb5b312011-01-10 02:58:51 +0000163 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
Jakob Stoklund Olesen92a00832012-06-01 20:36:54 +0000164 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
165 LivePhysRegs.set(*AI);
Dan Gohman269999c2008-09-23 21:40:44 +0000166 }
167 }
168 }
Dan Gohmanc24cd012008-09-17 00:43:24 +0000169 }
170 }
171
Dan Gohman6b33aa42008-09-24 00:27:38 +0000172 LivePhysRegs.clear();
Dan Gohmanc24cd012008-09-17 00:43:24 +0000173 return AnyChanges;
174}