Misha Brukman | cd4f51b | 2004-08-02 16:54:54 +0000 | [diff] [blame] | 1 | //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by the LLVM research group and is distributed under |
| 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | class Format<bits<5> val> { |
| 14 | bits<5> Value = val; |
| 15 | } |
| 16 | |
| 17 | def Pseudo: Format<0>; |
| 18 | def Gpr : Format<1>; |
| 19 | def Gpr0 : Format<2>; |
| 20 | def Simm16 : Format<3>; |
| 21 | def Zimm16 : Format<4>; |
| 22 | def PCRelimm24 : Format<5>; |
| 23 | def Imm24 : Format<6>; |
| 24 | def Imm5 : Format<7>; |
| 25 | def PCRelimm14 : Format<8>; |
| 26 | def Imm14 : Format<9>; |
| 27 | def Imm2 : Format<10>; |
| 28 | def Crf : Format<11>; |
| 29 | def Imm3 : Format<12>; |
| 30 | def Imm1 : Format<13>; |
| 31 | def Fpr : Format<14>; |
| 32 | def Imm4 : Format<15>; |
| 33 | def Imm8 : Format<16>; |
| 34 | def Disimm16 : Format<17>; |
| 35 | def Disimm14 : Format<18>; |
| 36 | def Spr : Format<19>; |
| 37 | def Sgr : Format<20>; |
| 38 | def Imm15 : Format<21>; |
| 39 | def Vpr : Format<22>; |
| 40 | |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 41 | //===----------------------------------------------------------------------===// |
| 42 | // |
| 43 | // PowerPC instruction formats |
Misha Brukman | cd4f51b | 2004-08-02 16:54:54 +0000 | [diff] [blame] | 44 | |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 45 | class PPC32I<string name, bits<6> opcode, bit ppc64, bit vmx> : Instruction { |
| 46 | field bits<32> Inst; |
Misha Brukman | cd4f51b | 2004-08-02 16:54:54 +0000 | [diff] [blame] | 47 | |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 48 | bits<3> ArgCount; |
| 49 | bits<5> Arg0Type; |
| 50 | bits<5> Arg1Type; |
| 51 | bits<5> Arg2Type; |
| 52 | bits<5> Arg3Type; |
| 53 | bits<5> Arg4Type; |
| 54 | bit PPC64 = ppc64; |
| 55 | bit VMX = vmx; |
Misha Brukman | cd4f51b | 2004-08-02 16:54:54 +0000 | [diff] [blame] | 56 | |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 57 | let Name = name; |
Misha Brukman | 5295e1d | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 58 | let Namespace = "PPC32"; |
| 59 | let Inst{0-5} = opcode; |
Misha Brukman | cd4f51b | 2004-08-02 16:54:54 +0000 | [diff] [blame] | 60 | } |
| 61 | |
Misha Brukman | 5295e1d | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 62 | // 1.7.1 I-Form |
| 63 | class IForm<string name, bits<6> opcode, bit aa, bit lk, bit ppc64, bit vmx> |
| 64 | : PPC32I<name, opcode, ppc64, vmx> { |
| 65 | field bits<24> LI; |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 66 | |
Misha Brukman | 5295e1d | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 67 | let ArgCount = 1; |
| 68 | let Arg0Type = Imm24.Value; |
| 69 | let Arg1Type = 0; |
| 70 | let Arg2Type = 0; |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 71 | let Arg3Type = 0; |
| 72 | let Arg4Type = 0; |
| 73 | |
Misha Brukman | 5295e1d | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 74 | let Inst{6-29} = LI; |
| 75 | let Inst{30} = aa; |
| 76 | let Inst{31} = lk; |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 77 | } |
| 78 | |
Misha Brukman | 5295e1d | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 79 | // 1.7.2 B-Form |
| 80 | class BForm<string name, bits<6> opcode, bit aa, bit lk, bit ppc64, bit vmx> |
| 81 | : PPC32I<name, opcode, ppc64, vmx> { |
| 82 | field bits<5> BO; |
| 83 | field bits<5> BI; |
| 84 | field bits<14> BD; |
| 85 | |
| 86 | let ArgCount = 3; |
| 87 | let Arg0Type = Imm5.Value; |
| 88 | let Arg1Type = Imm5.Value; |
| 89 | let Arg2Type = PCRelimm14.Value; |
| 90 | let Arg3Type = 0; |
| 91 | let Arg4Type = 0; |
| 92 | |
| 93 | let Inst{6-10} = BO; |
| 94 | let Inst{11-15} = BI; |
| 95 | let Inst{16-29} = BD; |
| 96 | let Inst{30} = aa; |
| 97 | let Inst{31} = lk; |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 98 | } |
| 99 | |
Misha Brukman | 5295e1d | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 100 | class BForm_ext<string name, bits<6> opcode, bit aa, bit lk, bits<5> bo, |
| 101 | bits<5> bi, bit ppc64, bit vmx> |
| 102 | : BForm<name, opcode, aa, lk, ppc64, vmx> { |
| 103 | let ArgCount = 2; |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 104 | let Arg2Type = Imm5.Value; |
Misha Brukman | 5295e1d | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 105 | let Arg1Type = PCRelimm14.Value; |
| 106 | let Arg2Type = 0; |
| 107 | let BO = bo; |
| 108 | let BI = bi; |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 109 | } |
| 110 | |
Misha Brukman | 5295e1d | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 111 | // 1.7.4 D-Form |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 112 | class DForm_base<string name, bits<6> opcode, bit ppc64, bit vmx> |
| 113 | : PPC32I<name, opcode, ppc64, vmx> { |
| 114 | field bits<5> A; |
| 115 | field bits<5> B; |
| 116 | field bits<16> C; |
| 117 | |
| 118 | let ArgCount = 3; |
| 119 | let Arg0Type = Gpr.Value; |
| 120 | let Arg1Type = Gpr.Value; |
| 121 | let Arg2Type = Simm16.Value; |
| 122 | let Arg3Type = 0; |
| 123 | let Arg4Type = 0; |
| 124 | |
| 125 | let Inst{6-10} = A; |
| 126 | let Inst{11-15} = B; |
| 127 | let Inst{16-31} = C; |
| 128 | } |
| 129 | |
| 130 | class DForm_1<string name, bits<6> opcode, bit ppc64, bit vmx> |
| 131 | : DForm_base<name, opcode, ppc64, vmx> { |
Misha Brukman | 5295e1d | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 132 | let Arg1Type = Disimm16.Value; |
| 133 | let Arg2Type = Gpr0.Value; |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 134 | } |
| 135 | |
| 136 | class DForm_2<string name, bits<6> opcode, bit ppc64, bit vmx> |
| 137 | : DForm_base<name, opcode, ppc64, vmx>; |
| 138 | |
| 139 | class DForm_2_r0<string name, bits<6> opcode, bit ppc64, bit vmx> |
| 140 | : DForm_base<name, opcode, ppc64, vmx> { |
| 141 | let Arg1Type = Gpr0.Value; |
| 142 | } |
| 143 | |
| 144 | // Currently we make the use/def reg distinction in ISel, not tablegen |
| 145 | class DForm_3<string name, bits<6> opcode, bit ppc64, bit vmx> |
| 146 | : DForm_1<name, opcode, ppc64, vmx>; |
| 147 | |
| 148 | class DForm_4<string name, bits<6> opcode, bit ppc64, bit vmx> |
Misha Brukman | 09d87b4 | 2004-08-10 18:07:55 +0000 | [diff] [blame^] | 149 | : DForm_base<name, opcode, ppc64, vmx> { |
| 150 | let Arg2Type = Zimm16.Value; |
| 151 | } |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 152 | |
Misha Brukman | 5295e1d | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 153 | class DForm_4_zero<string name, bits<6> opcode, bit ppc64, bit vmx> |
| 154 | : DForm_1<name, opcode, ppc64, vmx> { |
| 155 | let ArgCount = 0; |
| 156 | let Arg0Type = 0; |
| 157 | let Arg1Type = 0; |
| 158 | let Arg2Type = 0; |
| 159 | let A = 0; |
| 160 | let B = 0; |
| 161 | let C = 0; |
| 162 | } |
| 163 | |
| 164 | class DForm_5<string name, bits<6> opcode, bit ppc64, bit vmx> |
| 165 | : PPC32I<name, opcode, ppc64, vmx> { |
| 166 | field bits<3> BF; |
| 167 | field bits<1> L; |
| 168 | field bits<5> RA; |
| 169 | field bits<16> I; |
| 170 | |
| 171 | let ArgCount = 4; |
| 172 | let Arg0Type = Imm3.Value; |
| 173 | let Arg1Type = Imm1.Value; |
| 174 | let Arg2Type = Gpr.Value; |
| 175 | let Arg3Type = Simm16.Value; |
| 176 | let Arg4Type = 0; |
| 177 | |
| 178 | let Inst{6-8} = BF; |
| 179 | let Inst{9} = 0; |
| 180 | let Inst{10} = L; |
| 181 | let Inst{11-15} = RA; |
| 182 | let Inst{16-31} = I; |
| 183 | } |
| 184 | |
| 185 | class DForm_5_ext<string name, bits<6> opcode, bit ppc64, bit vmx> |
| 186 | : DForm_5<name, opcode, ppc64, vmx> { |
| 187 | let L = 0; |
| 188 | } |
| 189 | |
| 190 | class DForm_6<string name, bits<6> opcode, bit ppc64, bit vmx> |
| 191 | : DForm_5<name, opcode, ppc64, vmx> { |
| 192 | let Arg3Type = Zimm16.Value; |
| 193 | } |
| 194 | |
| 195 | class DForm_6_ext<string name, bits<6> opcode, bit ppc64, bit vmx> |
| 196 | : DForm_6<name, opcode, ppc64, vmx> { |
| 197 | let L = 0; |
| 198 | } |
| 199 | |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 200 | class DForm_7<string name, bits<6> opcode, bit ppc64, bit vmx> |
| 201 | : DForm_base<name, opcode, ppc64, vmx> { |
| 202 | let Arg1Type = Imm5.Value; |
| 203 | } |
| 204 | |
Misha Brukman | 5295e1d | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 205 | class DForm_8<string name, bits<6> opcode, bit ppc64, bit vmx> |
| 206 | : DForm_1<name, opcode, ppc64, vmx> { |
| 207 | let Arg0Type = Fpr.Value; |
| 208 | } |
| 209 | |
| 210 | class DForm_9<string name, bits<6> opcode, bit ppc64, bit vmx> |
| 211 | : DForm_1<name, opcode, ppc64, vmx> { |
| 212 | let Arg0Type = Fpr.Value; |
| 213 | } |
| 214 | |
| 215 | // 1.7.6 X-Form |
| 216 | class XForm_base_r3xo<string name, bits<6> opcode, bits<10> xo, bit rc, |
| 217 | bit ppc64, bit vmx> : PPC32I<name, opcode, ppc64, vmx> { |
| 218 | let ArgCount = 3; |
| 219 | field bits<5> ST; |
| 220 | field bits<5> A; |
| 221 | field bits<5> B; |
| 222 | |
| 223 | let ArgCount = 3; |
| 224 | let Arg0Type = Gpr.Value; |
| 225 | let Arg1Type = Gpr.Value; |
| 226 | let Arg2Type = Gpr.Value; |
| 227 | let Arg3Type = 0; |
| 228 | let Arg4Type = 0; |
| 229 | |
| 230 | let Inst{6-10} = ST; |
| 231 | let Inst{11-15} = A; |
| 232 | let Inst{16-20} = B; |
| 233 | let Inst{21-30} = xo; |
| 234 | let Inst{31} = rc; |
| 235 | } |
| 236 | |
| 237 | class XForm_1<string name, bits<6> opcode, bits<10> xo, bit ppc64, |
| 238 | bit vmx> : XForm_base_r3xo<name, opcode, xo, 0, ppc64, vmx>; |
| 239 | |
| 240 | class XForm_5<string name, bits<6> opcode, bits<10> xo, bit ppc64, |
| 241 | bit vmx> : XForm_base_r3xo<name, opcode, xo, 0, ppc64, vmx> { |
| 242 | let ArgCount = 1; |
| 243 | let Arg1Type = 0; |
| 244 | let Arg2Type = 0; |
| 245 | let A = 0; |
| 246 | let B = 0; |
| 247 | } |
| 248 | |
| 249 | class XForm_6<string name, bits<6> opcode, bits<10> xo, bit rc, bit ppc64, |
| 250 | bit vmx> : XForm_base_r3xo<name, opcode, xo, rc, ppc64, vmx>; |
| 251 | |
| 252 | class XForm_7<string name, bits<6> opcode, bits<10> xo, bit ppc64, bit vmx> |
| 253 | : XForm_base_r3xo<name, opcode, xo, 1, ppc64, vmx>; |
| 254 | |
| 255 | class XForm_8<string name, bits<6> opcode, bits<10> xo, bit ppc64, bit vmx> |
| 256 | : XForm_base_r3xo<name, opcode, xo, 0, ppc64, vmx>; |
| 257 | |
| 258 | class XForm_10<string name, bits<6> opcode, bits<10> xo, bit rc, bit ppc64, |
| 259 | bit vmx> : XForm_base_r3xo<name, opcode, xo, rc, ppc64, vmx> { |
| 260 | let Arg2Type = Imm5.Value; |
| 261 | } |
| 262 | |
| 263 | class XForm_11<string name, bits<6> opcode, bits<10> xo, bit rc, bit ppc64, |
| 264 | bit vmx> : XForm_base_r3xo<name, opcode, xo, rc, ppc64, vmx> { |
| 265 | let ArgCount = 2; |
| 266 | let Arg2Type = 0; |
| 267 | let B = 0; |
| 268 | } |
| 269 | |
| 270 | class XForm_16<string name, bits<6> opcode, bits<10> xo, bit ppc64, bit vmx> |
| 271 | : PPC32I<name, opcode, ppc64, vmx> { |
| 272 | field bits<3> BF; |
| 273 | field bits<1> L; |
| 274 | field bits<5> RA; |
| 275 | field bits<5> RB; |
| 276 | |
| 277 | let ArgCount = 4; |
| 278 | let Arg0Type = Imm3.Value; |
| 279 | let Arg1Type = Imm1.Value; |
| 280 | let Arg2Type = Gpr.Value; |
| 281 | let Arg3Type = Gpr.Value; |
| 282 | let Arg4Type = 0; |
| 283 | |
| 284 | let Inst{6-8} = BF; |
| 285 | let Inst{9} = 0; |
| 286 | let Inst{10} = L; |
| 287 | let Inst{11-15} = RA; |
| 288 | let Inst{16-20} = RB; |
| 289 | let Inst{21-30} = xo; |
| 290 | let Inst{31} = 0; |
| 291 | } |
| 292 | |
| 293 | class XForm_16_ext<string name, bits<6> opcode, bits<10> xo, bit ppc64, bit vmx> |
| 294 | : XForm_16<name, opcode, xo, ppc64, vmx> { |
| 295 | let L = 0; |
| 296 | } |
| 297 | |
| 298 | class XForm_17<string name, bits<6> opcode, bits<10> xo, bit ppc64, bit vmx> |
| 299 | : PPC32I<name, opcode, ppc64, vmx> { |
| 300 | field bits<3> BF; |
| 301 | field bits<5> FRA; |
| 302 | field bits<5> FRB; |
| 303 | |
| 304 | let ArgCount = 3; |
| 305 | let Arg0Type = Imm3.Value; |
| 306 | let Arg1Type = Fpr.Value; |
| 307 | let Arg2Type = Fpr.Value; |
| 308 | let Arg3Type = 0; |
| 309 | let Arg4Type = 0; |
| 310 | |
| 311 | let Inst{6-8} = BF; |
| 312 | let Inst{9-10} = 0; |
| 313 | let Inst{11-15} = FRA; |
| 314 | let Inst{16-20} = FRB; |
| 315 | let Inst{21-30} = xo; |
| 316 | let Inst{31} = 0; |
| 317 | } |
| 318 | |
| 319 | class XForm_25<string name, bits<6> opcode, bits<10> xo, bit ppc64, |
| 320 | bit vmx> : XForm_base_r3xo<name, opcode, xo, 0, ppc64, vmx> { |
| 321 | let Arg0Type = Fpr.Value; |
| 322 | let Arg1Type = Gpr0.Value; |
| 323 | } |
| 324 | |
| 325 | class XForm_26<string name, bits<6> opcode, bits<10> xo, bit rc, bit ppc64, |
| 326 | bit vmx> : XForm_base_r3xo<name, opcode, xo, rc, ppc64, vmx> { |
| 327 | let ArgCount = 2; |
| 328 | let Arg0Type = Fpr.Value; |
| 329 | let Arg1Type = Fpr.Value; |
| 330 | let Arg2Type = 0; |
| 331 | let A = 0; |
| 332 | } |
| 333 | |
| 334 | class XForm_28<string name, bits<6> opcode, bits<10> xo, bit ppc64, |
| 335 | bit vmx> : XForm_base_r3xo<name, opcode, xo, 0, ppc64, vmx> { |
| 336 | let Arg0Type = Fpr.Value; |
| 337 | let Arg1Type = Gpr0.Value; |
| 338 | } |
| 339 | |
| 340 | // 1.7.7 XL-Form |
| 341 | class XLForm_1<string name, bits<6> opcode, bits<10> xo, bit ppc64, bit vmx> |
| 342 | : XForm_base_r3xo<name, opcode, xo, 0, ppc64, vmx> { |
| 343 | let Arg0Type = Imm5.Value; |
| 344 | let Arg1Type = Imm5.Value; |
| 345 | let Arg2Type = Imm5.Value; |
| 346 | } |
| 347 | |
| 348 | class XLForm_2<string name, bits<6> opcode, bits<10> xo, bit lk, bit ppc64, |
| 349 | bit vmx> : PPC32I<name, opcode, ppc64, vmx> { |
| 350 | field bits<5> BO; |
| 351 | field bits<5> BI; |
| 352 | field bits<2> BH; |
| 353 | |
| 354 | let ArgCount = 3; |
| 355 | let Arg0Type = Imm5.Value; |
| 356 | let Arg1Type = Imm5.Value; |
| 357 | let Arg2Type = Imm2.Value; |
| 358 | let Arg3Type = 0; |
| 359 | let Arg4Type = 0; |
| 360 | |
| 361 | let Inst{6-10} = BO; |
| 362 | let Inst{11-15} = BI; |
| 363 | let Inst{16-18} = 0; |
| 364 | let Inst{19-20} = BH; |
| 365 | let Inst{21-30} = xo; |
| 366 | let Inst{31} = lk; |
| 367 | } |
| 368 | |
| 369 | class XLForm_2_ext<string name, bits<6> opcode, bits<10> xo, bits<5> bo, |
| 370 | bits<5> bi, bit lk, bit ppc64, bit vmx> |
| 371 | : XLForm_2<name, opcode, xo, lk, ppc64, vmx> { |
| 372 | let ArgCount = 0; |
| 373 | let Arg0Type = 0; |
| 374 | let Arg1Type = 0; |
| 375 | let Arg2Type = 0; |
| 376 | let BO = bo; |
| 377 | let BI = bi; |
| 378 | let BH = 0; |
| 379 | } |
| 380 | |
| 381 | // 1.7.8 XFX-Form |
| 382 | class XFXForm_1<string name, bits<6> opcode, bits<10> xo, bit ppc64, bit vmx> |
| 383 | : PPC32I<name, opcode, ppc64, vmx> { |
| 384 | field bits<5> ST; |
| 385 | field bits<10> SPR; |
| 386 | |
| 387 | let ArgCount = 2; |
| 388 | let Arg0Type = Imm5.Value; |
| 389 | let Arg1Type = Gpr.Value; |
| 390 | let Arg2Type = 0; |
| 391 | let Arg3Type = 0; |
| 392 | let Arg4Type = 0; |
| 393 | |
| 394 | let Inst{6-10} = ST; |
| 395 | let Inst{11-20} = SPR; |
| 396 | let Inst{21-30} = xo; |
| 397 | let Inst{31} = 0; |
| 398 | } |
| 399 | |
| 400 | class XFXForm_1_ext<string name, bits<6> opcode, bits<10> xo, bits<10> spr, |
| 401 | bit ppc64, bit vmx> : XFXForm_1<name,opcode,xo,ppc64,vmx> { |
| 402 | let ArgCount = 1; |
| 403 | let Arg0Type = Gpr.Value; |
| 404 | let Arg1Type = 0; |
| 405 | let SPR = spr; |
| 406 | } |
| 407 | |
| 408 | class XFXForm_7<string name, bits<6> opcode, bits<10> xo, bit ppc64, bit vmx> |
| 409 | : XFXForm_1<name, opcode, xo, ppc64, vmx>; |
| 410 | |
| 411 | class XFXForm_7_ext<string name, bits<6> opcode, bits<10> xo, bits<10> spr, |
| 412 | bit ppc64, bit vmx> : XFXForm_7<name,opcode,xo,ppc64,vmx> { |
| 413 | let ArgCount = 1; |
| 414 | let Arg0Type = Gpr.Value; |
| 415 | let Arg1Type = 0; |
| 416 | let SPR = spr; |
| 417 | } |
| 418 | |
| 419 | // 1.7.11 XO-Form |
| 420 | class XOForm_1<string name, bits<6> opcode, bits<9> xo, bit oe, bit rc, |
| 421 | bit ppc64, bit vmx> : PPC32I<name, opcode, ppc64, vmx> { |
| 422 | field bits<5> RT; |
| 423 | field bits<5> RA; |
| 424 | field bits<5> RB; |
| 425 | |
| 426 | let ArgCount = 3; |
| 427 | let Arg0Type = Gpr.Value; |
| 428 | let Arg1Type = Gpr.Value; |
| 429 | let Arg2Type = Gpr.Value; |
| 430 | let Arg3Type = 0; |
| 431 | let Arg4Type = 0; |
| 432 | |
| 433 | let Inst{6-10} = RT; |
| 434 | let Inst{11-15} = RA; |
| 435 | let Inst{16-20} = RB; |
| 436 | let Inst{21} = oe; |
| 437 | let Inst{22-30} = xo; |
| 438 | let Inst{31} = rc; |
| 439 | } |
| 440 | |
| 441 | // This is a reversal of the two operands, used notably by extended ops SUB*: |
| 442 | // sub x, y, z == subf x, z, y |
| 443 | // subc x, y, z == subfc x, z, y |
| 444 | class XOForm_1_rev<string name, bits<6> opcode, bits<9> xo, bit oe, bit rc, |
| 445 | bit ppc64, bit vmx> |
| 446 | : XOForm_1<name, opcode, xo, oe, rc, ppc64, vmx> { |
| 447 | let Inst{11-15} = RB; |
| 448 | let Inst{16-20} = RA; |
| 449 | } |
| 450 | |
| 451 | class XOForm_2<string name, bits<6> opcode, bits<9> xo, bit rc, bit ppc64, |
| 452 | bit vmx> : XOForm_1<name, opcode, xo, 0, rc, ppc64, vmx>; |
| 453 | |
| 454 | class XOForm_3<string name, bits<6> opcode, bits<9> xo, bit oe, bit rc, |
| 455 | bit ppc64, bit vmx> : XOForm_1<name,opcode,xo,oe,rc,ppc64,vmx> { |
| 456 | let RB = 0; |
| 457 | } |
| 458 | |
| 459 | // 1.7.12 A-Form |
| 460 | class AForm_1<string name, bits<6> opcode, bits<5> xo, bit rc, bit ppc64, |
| 461 | bit vmx> : PPC32I<name, opcode, ppc64, vmx> { |
| 462 | let ArgCount = 4; |
| 463 | field bits<5> FRT; |
| 464 | field bits<5> FRA; |
| 465 | field bits<5> FRB; |
| 466 | field bits<5> FRC; |
| 467 | |
| 468 | let Arg0Type = Fpr.Value; |
| 469 | let Arg1Type = Fpr.Value; |
| 470 | let Arg2Type = Fpr.Value; |
| 471 | let Arg3Type = Fpr.Value; |
| 472 | let Arg4Type = 0; |
| 473 | |
| 474 | let Inst{6-10} = FRT; |
| 475 | let Inst{11-15} = FRA; |
| 476 | let Inst{16-20} = FRB; |
| 477 | let Inst{21-25} = FRC; |
| 478 | let Inst{26-30} = xo; |
| 479 | let Inst{31} = rc; |
| 480 | } |
| 481 | |
| 482 | class AForm_2<string name, bits<6> opcode, bits<5> xo, bit rc, bit ppc64, |
| 483 | bit vmx> : AForm_1<name, opcode, xo, rc, ppc64, vmx> { |
| 484 | let ArgCount = 3; |
| 485 | let Arg3Type = 0; |
| 486 | let FRC = 0; |
| 487 | } |
| 488 | |
| 489 | class AForm_3<string name, bits<6> opcode, bits<5> xo, bit rc, bit ppc64, |
| 490 | bit vmx> : AForm_1<name, opcode, xo, rc, ppc64, vmx> { |
| 491 | let ArgCount = 3; |
| 492 | let Arg3Type = 0; |
| 493 | let FRB = 0; |
| 494 | } |
| 495 | |
| 496 | class AForm_4<string name, bits<6> opcode, bits<5> xo, bit rc, bit ppc64, |
| 497 | bit vmx> : AForm_1<name, opcode, xo, rc, ppc64, vmx> { |
| 498 | let ArgCount = 2; |
| 499 | let Arg2Type = 0; |
| 500 | let Arg3Type = 0; |
| 501 | let FRA = 0; |
| 502 | let FRC = 0; |
| 503 | } |
| 504 | |
| 505 | // 1.7.13 M-Form |
| 506 | class MForm_1<string name, bits<6> opcode, bit rc, bit ppc64, bit vmx> |
| 507 | : PPC32I<name, opcode, ppc64, vmx> { |
| 508 | let ArgCount = 5; |
| 509 | field bits<5> RS; |
| 510 | field bits<5> RA; |
| 511 | field bits<5> RB; |
| 512 | field bits<5> MB; |
| 513 | field bits<5> ME; |
| 514 | |
| 515 | let Arg0Type = Gpr.Value; |
| 516 | let Arg1Type = Gpr.Value; |
| 517 | let Arg2Type = Gpr.Value; |
| 518 | let Arg3Type = Imm5.Value; |
| 519 | let Arg4Type = Imm5.Value; |
| 520 | |
| 521 | let Inst{6-10} = RS; |
| 522 | let Inst{11-15} = RA; |
| 523 | let Inst{16-20} = RB; |
| 524 | let Inst{21-25} = MB; |
| 525 | let Inst{26-30} = ME; |
| 526 | let Inst{31} = rc; |
| 527 | } |
| 528 | |
| 529 | class MForm_2<string name, bits<6> opcode, bit rc, bit ppc64, bit vmx> |
| 530 | : MForm_1<name, opcode, rc, ppc64, vmx> { |
| 531 | let Arg2Type = Imm5.Value; |
| 532 | } |
| 533 | |
Misha Brukman | 6b21bde | 2004-08-02 21:56:35 +0000 | [diff] [blame] | 534 | //===----------------------------------------------------------------------===// |
| 535 | |
Misha Brukman | 5295e1d | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 536 | class Pseudo<string name> : PPC32I<name, 0, 0, 0> { |
Misha Brukman | cd4f51b | 2004-08-02 16:54:54 +0000 | [diff] [blame] | 537 | let Name = name; |
| 538 | let ArgCount = 0; |
| 539 | let PPC64 = 0; |
| 540 | let VMX = 0; |
| 541 | |
Misha Brukman | 5295e1d | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 542 | let Arg0Type = Pseudo.Value; |
| 543 | let Arg1Type = Pseudo.Value; |
| 544 | let Arg2Type = Pseudo.Value; |
| 545 | let Arg3Type = Pseudo.Value; |
Misha Brukman | cd4f51b | 2004-08-02 16:54:54 +0000 | [diff] [blame] | 546 | let Arg4Type = 0; |
Misha Brukman | cd4f51b | 2004-08-02 16:54:54 +0000 | [diff] [blame] | 547 | |
| 548 | let Inst {31-0} = 0; |
| 549 | } |