Chris Lattner | feb62c3 | 2001-09-07 21:04:20 +0000 | [diff] [blame] | 1 | /* Title: SparcRegClassInfo.h -*- C++ -*- |
Ruchira Sasanka | b7237c8 | 2001-08-31 20:30:42 +0000 | [diff] [blame] | 2 | Author: Ruchira Sasanka |
| 3 | Date: Aug 20, 01 |
| 4 | Purpose: Contains the description of integer register class of Sparc |
| 5 | */ |
| 6 | |
| 7 | |
| 8 | #ifndef SPARC_INT_REG_CLASS_H |
| 9 | #define SPARC_INT_REG_CLASS_H |
| 10 | |
Ruchira Sasanka | b7237c8 | 2001-08-31 20:30:42 +0000 | [diff] [blame] | 11 | #include "llvm/CodeGen/TargetMachine.h" |
Ruchira Sasanka | b7237c8 | 2001-08-31 20:30:42 +0000 | [diff] [blame] | 12 | |
| 13 | //----------------------------------------------------------------------------- |
| 14 | // Integer Register Class |
| 15 | //----------------------------------------------------------------------------- |
| 16 | |
| 17 | |
| 18 | // Int register names in same order as enum in class SparcIntRegOrder |
| 19 | |
| 20 | static string const IntRegNames[] = |
| 21 | { "g1", "g2", "g3", "g4", "g5", "g6", "g7", |
| 22 | "o0", "o1", "o2", "o3", "o4", "o5", "o7", |
| 23 | "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", |
| 24 | "i0", "i1", "i2", "i3", "i4", "i5", |
| 25 | "g0", "i6", "i7", "o6" }; |
| 26 | |
| 27 | |
| 28 | |
| 29 | class SparcIntRegOrder{ |
| 30 | |
| 31 | public: |
| 32 | |
| 33 | enum RegsInPrefOrder // colors possible for a LR (in preferred order) |
| 34 | { |
| 35 | // --- following colors are volatile across function calls |
| 36 | // %g0 can't be used for coloring - always 0 |
| 37 | |
| 38 | g1, g2, g3, g4, g5, g6, g7, //%g1-%g7 |
| 39 | o0, o1, o2, o3, o4, o5, o7, // %o0-%o5, |
| 40 | |
| 41 | // %o6 is sp, |
| 42 | // all %0's can get modified by a call |
| 43 | |
| 44 | // --- following colors are NON-volatile across function calls |
| 45 | |
| 46 | l0, l1, l2, l3, l4, l5, l6, l7, // %l0-%l7 |
| 47 | i0, i1, i2, i3, i4, i5, // %i0-%i5: i's need not be preserved |
| 48 | |
| 49 | // %i6 is the fp - so not allocated |
| 50 | // %i7 is the ret address - can be used if saved |
| 51 | |
| 52 | // max # of colors reg coloring can allocate (NumOfAvailRegs) |
| 53 | |
| 54 | // --- following colors are not available for allocation within this phase |
| 55 | // --- but can appear for pre-colored ranges |
| 56 | |
Ruchira Sasanka | f5788aa | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 57 | g0, i6, i7, o6 |
Ruchira Sasanka | b7237c8 | 2001-08-31 20:30:42 +0000 | [diff] [blame] | 58 | |
Ruchira Sasanka | f5788aa | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 59 | |
Ruchira Sasanka | b7237c8 | 2001-08-31 20:30:42 +0000 | [diff] [blame] | 60 | |
| 61 | }; |
| 62 | |
| 63 | // max # of colors reg coloring can allocate |
| 64 | static unsigned int const NumOfAvailRegs = g0; |
| 65 | |
| 66 | static unsigned int const StartOfNonVolatileRegs = l0; |
| 67 | static unsigned int const StartOfAllRegs = g1; |
Ruchira Sasanka | f5788aa | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 68 | static unsigned int const NumOfAllRegs = o6 + 1; |
Ruchira Sasanka | b7237c8 | 2001-08-31 20:30:42 +0000 | [diff] [blame] | 69 | |
| 70 | |
| 71 | static const string getRegName(const unsigned reg) { |
| 72 | assert( reg < NumOfAllRegs ); |
| 73 | return IntRegNames[reg]; |
| 74 | } |
| 75 | |
| 76 | }; |
| 77 | |
| 78 | |
| 79 | |
| 80 | class SparcIntRegClass : public MachineRegClassInfo |
| 81 | { |
| 82 | public: |
| 83 | |
| 84 | SparcIntRegClass(unsigned ID) |
| 85 | : MachineRegClassInfo(0, |
| 86 | SparcIntRegOrder::NumOfAvailRegs, |
| 87 | SparcIntRegOrder::NumOfAllRegs) |
| 88 | { } |
| 89 | |
| 90 | void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const; |
| 91 | |
| 92 | }; |
| 93 | |
| 94 | //----------------------------------------------------------------------------- |
| 95 | // Float Register Class |
| 96 | //----------------------------------------------------------------------------- |
| 97 | |
| 98 | static string const FloatRegNames[] = |
| 99 | { |
| 100 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", |
| 101 | "f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", |
| 102 | "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", |
| 103 | "f30", "f31", "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39", |
| 104 | "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49", |
| 105 | "f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59", |
| 106 | "f60", "f61", "f62", "f63" |
| 107 | }; |
| 108 | |
| 109 | |
| 110 | class SparcFloatRegOrder{ |
| 111 | |
| 112 | public: |
| 113 | |
| 114 | enum RegsInPrefOrder { |
| 115 | |
| 116 | f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, |
| 117 | f10, f11, f12, f13, f14, f15, f16, f17, f18, f19, |
| 118 | f20, f21, f22, f23, f24, f25, f26, f27, f28, f29, |
| 119 | f30, f31, f32, f33, f34, f35, f36, f37, f38, f39, |
| 120 | f40, f41, f42, f43, f44, f45, f46, f47, f48, f49, |
| 121 | f50, f51, f52, f53, f54, f55, f56, f57, f58, f59, |
| 122 | f60, f61, f62, f63 |
| 123 | |
| 124 | }; |
| 125 | |
| 126 | // there are 64 regs alltogether but only 32 regs can be allocated at |
| 127 | // a time. |
| 128 | |
| 129 | static unsigned int const NumOfAvailRegs = 32; |
| 130 | static unsigned int const NumOfAllRegs = 64; |
| 131 | |
| 132 | static unsigned int const StartOfNonVolatileRegs = f6; |
| 133 | static unsigned int const StartOfAllRegs = f0; |
| 134 | |
| 135 | |
| 136 | static const string getRegName(const unsigned reg) { |
| 137 | assert( reg < NumOfAllRegs ); |
| 138 | return FloatRegNames[reg]; |
| 139 | } |
| 140 | |
| 141 | |
| 142 | |
| 143 | }; |
| 144 | |
| 145 | |
| 146 | class SparcFloatRegClass : public MachineRegClassInfo |
| 147 | { |
| 148 | private: |
| 149 | |
| 150 | int findFloatColor(const IGNode *const Node, unsigned Start, |
| 151 | unsigned End, bool IsColorUsedArr[] ) const; |
| 152 | |
| 153 | public: |
| 154 | |
| 155 | SparcFloatRegClass(unsigned ID) |
| 156 | : MachineRegClassInfo(1, |
| 157 | SparcFloatRegOrder::NumOfAvailRegs, |
| 158 | SparcFloatRegOrder::NumOfAllRegs) |
| 159 | { } |
| 160 | |
| 161 | void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const; |
| 162 | |
| 163 | }; |
| 164 | |
| 165 | |
| 166 | |
| 167 | #endif |