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Krzysztof Parzyszek0e7d2d32016-04-28 16:43:16 +00001//==- HexagonAlias.td - Hexagon Instruction Aliases ---------*- tablegen -*-==//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10//===----------------------------------------------------------------------===//
11// Hexagon Instruction Mappings
12//===----------------------------------------------------------------------===//
13
14// V6_vassignp: Vector assign mapping.
15let hasNewValue = 1, opNewValue = 0, isAsmParserOnly = 1 in
16def HEXAGON_V6_vassignpair: CVI_VA_DV_Resource <
17 (outs VecDblRegs:$Vdd),
18 (ins VecDblRegs:$Vss),
19 "$Vdd = $Vss">;
20
21// maps Vd = #0 to Vd = vxor(Vd, Vd)
22def : InstAlias<"$Vd = #0",
23 (V6_vxor VectorRegs:$Vd, VectorRegs:$Vd, VectorRegs:$Vd)>,
24 Requires<[HasV60T]>;
25
26// maps Vdd = #0 to Vdd = vsub(Vdd, Vdd)
27def : InstAlias<"$Vdd = #0",
28 (V6_vsubw_dv VecDblRegs:$Vdd, VecDblRegs:$Vdd, VecDblRegs:$Vdd)>,
29 Requires<[HasV60T]>;