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Ulrich Weigand9e3577f2013-05-06 16:17:29 +00001; Test 32-bit signed comparison in which the second operand is a variable.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
5; Check register comparison.
6define double @f1(double %a, double %b, i32 %i1, i32 %i2) {
7; CHECK: f1:
Richard Sandiford0fb90ab2013-05-28 10:41:11 +00008; CHECK: crjl %r2, %r3
Ulrich Weigand9e3577f2013-05-06 16:17:29 +00009; CHECK: ldr %f0, %f2
10; CHECK: br %r14
11 %cond = icmp slt i32 %i1, %i2
12 %res = select i1 %cond, double %a, double %b
13 ret double %res
14}
15
16; Check the low end of the C range.
17define double @f2(double %a, double %b, i32 %i1, i32 *%ptr) {
18; CHECK: f2:
19; CHECK: c %r2, 0(%r3)
Richard Sandiford586f4172013-05-21 08:53:17 +000020; CHECK-NEXT: jl
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000021; CHECK: ldr %f0, %f2
22; CHECK: br %r14
23 %i2 = load i32 *%ptr
24 %cond = icmp slt i32 %i1, %i2
25 %res = select i1 %cond, double %a, double %b
26 ret double %res
27}
28
29; Check the high end of the aligned C range.
30define double @f3(double %a, double %b, i32 %i1, i32 *%base) {
31; CHECK: f3:
32; CHECK: c %r2, 4092(%r3)
Richard Sandiford586f4172013-05-21 08:53:17 +000033; CHECK-NEXT: jl
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000034; CHECK: ldr %f0, %f2
35; CHECK: br %r14
36 %ptr = getelementptr i32 *%base, i64 1023
37 %i2 = load i32 *%ptr
38 %cond = icmp slt i32 %i1, %i2
39 %res = select i1 %cond, double %a, double %b
40 ret double %res
41}
42
43; Check the next word up, which should use CY instead of C.
44define double @f4(double %a, double %b, i32 %i1, i32 *%base) {
45; CHECK: f4:
46; CHECK: cy %r2, 4096(%r3)
Richard Sandiford586f4172013-05-21 08:53:17 +000047; CHECK-NEXT: jl
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000048; CHECK: ldr %f0, %f2
49; CHECK: br %r14
50 %ptr = getelementptr i32 *%base, i64 1024
51 %i2 = load i32 *%ptr
52 %cond = icmp slt i32 %i1, %i2
53 %res = select i1 %cond, double %a, double %b
54 ret double %res
55}
56
57; Check the high end of the aligned CY range.
58define double @f5(double %a, double %b, i32 %i1, i32 *%base) {
59; CHECK: f5:
60; CHECK: cy %r2, 524284(%r3)
Richard Sandiford586f4172013-05-21 08:53:17 +000061; CHECK-NEXT: jl
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000062; CHECK: ldr %f0, %f2
63; CHECK: br %r14
64 %ptr = getelementptr i32 *%base, i64 131071
65 %i2 = load i32 *%ptr
66 %cond = icmp slt i32 %i1, %i2
67 %res = select i1 %cond, double %a, double %b
68 ret double %res
69}
70
71; Check the next word up, which needs separate address logic.
72; Other sequences besides this one would be OK.
73define double @f6(double %a, double %b, i32 %i1, i32 *%base) {
74; CHECK: f6:
75; CHECK: agfi %r3, 524288
76; CHECK: c %r2, 0(%r3)
Richard Sandiford586f4172013-05-21 08:53:17 +000077; CHECK-NEXT: jl
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000078; CHECK: ldr %f0, %f2
79; CHECK: br %r14
80 %ptr = getelementptr i32 *%base, i64 131072
81 %i2 = load i32 *%ptr
82 %cond = icmp slt i32 %i1, %i2
83 %res = select i1 %cond, double %a, double %b
84 ret double %res
85}
86
87; Check the high end of the negative aligned CY range.
88define double @f7(double %a, double %b, i32 %i1, i32 *%base) {
89; CHECK: f7:
90; CHECK: cy %r2, -4(%r3)
Richard Sandiford586f4172013-05-21 08:53:17 +000091; CHECK-NEXT: jl
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000092; CHECK: ldr %f0, %f2
93; CHECK: br %r14
94 %ptr = getelementptr i32 *%base, i64 -1
95 %i2 = load i32 *%ptr
96 %cond = icmp slt i32 %i1, %i2
97 %res = select i1 %cond, double %a, double %b
98 ret double %res
99}
100
101; Check the low end of the CY range.
102define double @f8(double %a, double %b, i32 %i1, i32 *%base) {
103; CHECK: f8:
104; CHECK: cy %r2, -524288(%r3)
Richard Sandiford586f4172013-05-21 08:53:17 +0000105; CHECK-NEXT: jl
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000106; CHECK: ldr %f0, %f2
107; CHECK: br %r14
108 %ptr = getelementptr i32 *%base, i64 -131072
109 %i2 = load i32 *%ptr
110 %cond = icmp slt i32 %i1, %i2
111 %res = select i1 %cond, double %a, double %b
112 ret double %res
113}
114
115; Check the next word down, which needs separate address logic.
116; Other sequences besides this one would be OK.
117define double @f9(double %a, double %b, i32 %i1, i32 *%base) {
118; CHECK: f9:
119; CHECK: agfi %r3, -524292
120; CHECK: c %r2, 0(%r3)
Richard Sandiford586f4172013-05-21 08:53:17 +0000121; CHECK-NEXT: jl
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000122; CHECK: ldr %f0, %f2
123; CHECK: br %r14
124 %ptr = getelementptr i32 *%base, i64 -131073
125 %i2 = load i32 *%ptr
126 %cond = icmp slt i32 %i1, %i2
127 %res = select i1 %cond, double %a, double %b
128 ret double %res
129}
130
131; Check that C allows an index.
132define double @f10(double %a, double %b, i32 %i1, i64 %base, i64 %index) {
133; CHECK: f10:
134; CHECK: c %r2, 4092({{%r4,%r3|%r3,%r4}})
Richard Sandiford586f4172013-05-21 08:53:17 +0000135; CHECK-NEXT: jl
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000136; CHECK: ldr %f0, %f2
137; CHECK: br %r14
138 %add1 = add i64 %base, %index
139 %add2 = add i64 %add1, 4092
140 %ptr = inttoptr i64 %add2 to i32 *
141 %i2 = load i32 *%ptr
142 %cond = icmp slt i32 %i1, %i2
143 %res = select i1 %cond, double %a, double %b
144 ret double %res
145}
146
147; Check that CY allows an index.
148define double @f11(double %a, double %b, i32 %i1, i64 %base, i64 %index) {
149; CHECK: f11:
150; CHECK: cy %r2, 4096({{%r4,%r3|%r3,%r4}})
Richard Sandiford586f4172013-05-21 08:53:17 +0000151; CHECK-NEXT: jl
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000152; CHECK: ldr %f0, %f2
153; CHECK: br %r14
154 %add1 = add i64 %base, %index
155 %add2 = add i64 %add1, 4096
156 %ptr = inttoptr i64 %add2 to i32 *
157 %i2 = load i32 *%ptr
158 %cond = icmp slt i32 %i1, %i2
159 %res = select i1 %cond, double %a, double %b
160 ret double %res
161}