blob: 8f4c7d3c402907d1949e5ace58436ee6533122db [file] [log] [blame]
Renato Golinca105642014-03-20 16:08:34 +00001=================
2TableGen BackEnds
3=================
4
5.. contents::
6 :local:
7
8Introduction
9============
10
11TableGen backends are at the core of TableGen's functionality. The source files
12provide the semantics to a generated (in memory) structure, but it's up to the
13backend to print this out in a way that is meaningful to the user (normally a
14C program including a file or a textual list of warnings, options and error
15messages).
16
17TableGen is used by both LLVM and Clang with very different goals. LLVM uses it
18as a way to automate the generation of massive amounts of information regarding
19instructions, schedules, cores and architecture features. Some backends generate
20output that is consumed by more than one source file, so they need to be created
21in a way that is easy to use pre-processor tricks. Some backends can also print
22C code structures, so that they can be directly included as-is.
23
24Clang, on the other hand, uses it mainly for diagnostic messages (errors,
25warnings, tips) and attributes, so more on the textual end of the scale.
26
27LLVM BackEnds
28=============
29
30.. warning::
31 This document is raw. Each section below needs three sub-sections: description
32 of its purpose with a list of users, output generated from generic input, and
33 finally why it needed a new backend (in case there's something similar).
34
Renato Golin1014ec32014-03-21 16:49:43 +000035Overall, each backend will take the same TableGen file type and transform into
36similar output for different targets/uses. There is an implicit contract between
37the TableGen files, the back-ends and their users.
Renato Golinca105642014-03-20 16:08:34 +000038
Renato Golin1014ec32014-03-21 16:49:43 +000039For instance, a global contract is that each back-end produces macro-guarded
40sections. Based on whether the file is included by a header or a source file,
41or even in which context of each file the include is being used, you have
42todefine a macro just before including it, to get the right output:
43
44.. code-block:: c++
45
46 #define GET_REGINFO_TARGET_DESC
47 #include "ARMGenRegisterInfo.inc"
48
49And just part of the generated file would be included. This is useful if
50you need the same information in multiple formats (instantiation, initialization,
51getter/setter functions, etc) from the same source TableGen file without having
52to re-compile the TableGen file multiple times.
53
54Sometimes, multiple macros might be defined before the same include file to
55output multiple blocks:
56
57.. code-block:: c++
58
59 #define GET_REGISTER_MATCHER
60 #define GET_SUBTARGET_FEATURE_NAME
61 #define GET_MATCHER_IMPLEMENTATION
62 #include "ARMGenAsmMatcher.inc"
63
64The macros will be undef'd automatically as they're used, in the include file.
65
66On all LLVM back-ends, the ``llvm-tblgen`` binary will be executed on the root
67TableGen file ``<Target>.td``, which should include all others. This guarantees
68that all information needed is accessible, and that no duplication is needed
69in the TbleGen files.
70
71CodeEmitter
72-----------
73
74**Purpose**: CodeEmitterGen uses the descriptions of instructions and their fields to
75construct an automated code emitter: a function that, given a MachineInstr,
76returns the (currently, 32-bit unsigned) value of the instruction.
77
78**Output**: C++ code, implementing the target's CodeEmitter
79class by overriding the virtual functions as ``<Target>CodeEmitter::function()``.
80
81**Usage**: Used to include directly at the end of ``<Target>CodeEmitter.cpp``, and
82with option `-mc-emitter` to be included in ``<Target>MCCodeEmitter.cpp``.
Renato Golinca105642014-03-20 16:08:34 +000083
84RegisterInfo
85------------
86
Renato Golin1014ec32014-03-21 16:49:43 +000087**Purpose**: This tablegen backend is responsible for emitting a description of a target
88register file for a code generator. It uses instances of the Register,
89RegisterAliases, and RegisterClass classes to gather this information.
90
91**Output**: C++ code with enums and structures representing the register mappings,
92properties, masks, etc.
93
94**Usage**: Both on ``<Target>BaseRegisterInfo`` and ``<Target>MCTargetDesc`` (headers
95and source files) with macros defining in which they are for declaration vs.
96initialization issues.
Renato Golinca105642014-03-20 16:08:34 +000097
98InstrInfo
99---------
100
Renato Golin1014ec32014-03-21 16:49:43 +0000101**Purpose**: This tablegen backend is responsible for emitting a description of the target
102instruction set for the code generator. (what are the differences from CodeEmitter?)
103
104**Output**: C++ code with enums and structures representing the register mappings,
105properties, masks, etc.
106
107**Usage**: Both on ``<Target>BaseInstrInfo`` and ``<Target>MCTargetDesc`` (headers
108and source files) with macros defining in which they are for declaration vs.
Renato Golinca105642014-03-20 16:08:34 +0000109
110AsmWriter
111---------
112
Renato Golin1014ec32014-03-21 16:49:43 +0000113**Purpose**: Emits an assembly printer for the current target.
114
115**Output**: Implementation of ``<Target>InstPrinter::printInstruction()``, among
116other things.
117
118**Usage**: Included directly into ``InstPrinter/<Target>InstPrinter.cpp``.
Renato Golinca105642014-03-20 16:08:34 +0000119
120AsmMatcher
121----------
122
Renato Golin1014ec32014-03-21 16:49:43 +0000123**Purpose**: Emits a target specifier matcher for
124converting parsed assembly operands in the MCInst structures. It also
125emits a matcher for custom operand parsing. Extensive documentation is
126written on the ``AsmMatcherEmitter.cpp`` file.
127
128**Output**: Assembler parsers' matcher functions, declarations, etc.
129
130**Usage**: Used in back-ends' ``AsmParser/<Target>AsmParser.cpp`` for
131building the AsmParser class.
Renato Golinca105642014-03-20 16:08:34 +0000132
133Disassembler
134------------
135
Renato Golin1014ec32014-03-21 16:49:43 +0000136**Purpose**: Contains disassembler table emitters for various
137architectures. Extensive documentation is written on the
138``DisassemblerEmitter.cpp`` file.
139
140**Output**: Decoding tables, static decoding functions, etc.
141
142**Usage**: Directly included in ``Disassembler/<Target>Disassembler.cpp``
143to cater for all default decodings, after all hand-made ones.
Renato Golinca105642014-03-20 16:08:34 +0000144
145PseudoLowering
146--------------
147
Renato Golin1014ec32014-03-21 16:49:43 +0000148**Purpose**: Generate pseudo instruction lowering.
149
150**Output**: Implements ``ARMAsmPrinter::emitPseudoExpansionLowering()``.
151
152**Usage**: Included directly into ``<Target>AsmPrinter.cpp``.
Renato Golinca105642014-03-20 16:08:34 +0000153
154CallingConv
155-----------
156
Renato Golin1014ec32014-03-21 16:49:43 +0000157**Purpose**: Responsible for emitting descriptions of the calling
158conventions supported by this target.
159
160**Output**: Implement static functions to deal with calling conventions
161chained by matching styles, returning false on no match.
162
163**Usage**: Used in ISelLowering and FastIsel as function pointers to
164implementation returned by a CC sellection function.
Renato Golinca105642014-03-20 16:08:34 +0000165
166DAGISel
167-------
168
Renato Golin1014ec32014-03-21 16:49:43 +0000169**Purpose**: Generate a DAG instruction selector.
170
171**Output**: Creates huge functions for automating DAG selection.
172
173**Usage**: Included in ``<Target>ISelDAGToDAG.cpp`` inside the target's
174implementation of ``SelectionDAGISel``.
Renato Golinca105642014-03-20 16:08:34 +0000175
176DFAPacketizer
177-------------
178
Renato Golin1014ec32014-03-21 16:49:43 +0000179**Purpose**: This class parses the Schedule.td file and produces an API that
180can be used to reason about whether an instruction can be added to a packet
181on a VLIW architecture. The class internally generates a deterministic finite
182automaton (DFA) that models all possible mappings of machine instructions
183to functional units as instructions are added to a packet.
184
185**Output**: Scheduling tables for GPU back-ends (Hexagon, AMD).
186
187**Usage**: Included directly on ``<Target>InstrInfo.cpp``.
Renato Golinca105642014-03-20 16:08:34 +0000188
189FastISel
190--------
191
Renato Golin1014ec32014-03-21 16:49:43 +0000192**Purpose**: This tablegen backend emits code for use by the "fast"
193instruction selection algorithm. See the comments at the top of
194lib/CodeGen/SelectionDAG/FastISel.cpp for background. This file
195scans through the target's tablegen instruction-info files
196and extracts instructions with obvious-looking patterns, and it emits
197code to look up these instructions by type and operator.
198
199**Output**: Generates ``Predicate`` and ``FastEmit`` methods.
200
201**Usage**: Implements private methods of the targets' implementation
202of ``FastISel`` class.
Renato Golinca105642014-03-20 16:08:34 +0000203
204Subtarget
205---------
206
Renato Golin1014ec32014-03-21 16:49:43 +0000207**Purpose**: Generate subtarget enumerations.
208
209**Output**: Enums, globals, local tables for sub-target information.
210
211**Usage**: Populates ``<Target>Subtarget`` and
212``MCTargetDesc/<Target>MCTargetDesc`` files (both headers and source).
Renato Golinca105642014-03-20 16:08:34 +0000213
214Intrinsic
215---------
216
Renato Golin1014ec32014-03-21 16:49:43 +0000217**Purpose**: Generate (target) intrinsic information.
Renato Golinca105642014-03-20 16:08:34 +0000218
219OptParserDefs
220-------------
221
Renato Golin1014ec32014-03-21 16:49:43 +0000222**Purpose**: Print enum values for a class.
Renato Golinca105642014-03-20 16:08:34 +0000223
224CTags
225-----
226
Renato Golin1014ec32014-03-21 16:49:43 +0000227**Purpose**: This tablegen backend emits an index of definitions in ctags(1)
228format. A helper script, utils/TableGen/tdtags, provides an easier-to-use
229interface; run 'tdtags -H' for documentation.
Renato Golinca105642014-03-20 16:08:34 +0000230
231Clang BackEnds
232==============
233
234ClangAttrClasses
235----------------
236
237Generate clang attribute clases.
238
239ClangAttrParserStringSwitches
240-----------------------------
241
242Generate all parser-related attribute string switches.
243
244ClangAttrImpl
245-------------
246
247Generate clang attribute implementations.
248
249ClangAttrList
250-------------
251
252Generate a clang attribute list.
253
254ClangAttrPCHRead
255----------------
256
257Generate clang PCH attribute reader.
258
259ClangAttrPCHWrite
260-----------------
261
262Generate clang PCH attribute writer.
263
264ClangAttrSpellingList
265---------------------
266
267Generate a clang attribute spelling list.
268
269ClangAttrSpellingListIndex
270--------------------------
271
272Generate a clang attribute spelling index.
273
274ClangAttrASTVisitor
275-------------------
276
277Generate a recursive AST visitor for clang attribute.
278
279ClangAttrTemplateInstantiate
280----------------------------
281
282Generate a clang template instantiate code.
283
284ClangAttrParsedAttrList
285-----------------------
286
287Generate a clang parsed attribute list.
288
289ClangAttrParsedAttrImpl
290-----------------------
291
292Generate the clang parsed attribute helpers.
293
294ClangAttrParsedAttrKinds
295------------------------
296
297Generate a clang parsed attribute kinds.
298
299ClangAttrDump
300-------------
301
302Generate clang attribute dumper.
303
304ClangDiagsDefs
305--------------
306
307Generate Clang diagnostics definitions.
308
309ClangDiagGroups
310---------------
311
312Generate Clang diagnostic groups.
313
314ClangDiagsIndexName
315-------------------
316
317Generate Clang diagnostic name index.
318
319ClangCommentNodes
320-----------------
321
322Generate Clang AST comment nodes.
323
324ClangDeclNodes
325--------------
326
327Generate Clang AST declaration nodes.
328
329ClangStmtNodes
330--------------
331
332Generate Clang AST statement nodes.
333
334ClangSACheckers
335---------------
336
337Generate Clang Static Analyzer checkers.
338
339ClangCommentHTMLTags
340--------------------
341
342Generate efficient matchers for HTML tag names that are used in documentation comments.
343
344ClangCommentHTMLTagsProperties
345------------------------------
346
347Generate efficient matchers for HTML tag properties.
348
349ClangCommentHTMLNamedCharacterReferences
350----------------------------------------
351
352Generate function to translate named character references to UTF-8 sequences.
353
354ClangCommentCommandInfo
355-----------------------
356
357Generate command properties for commands that are used in documentation comments.
358
359ClangCommentCommandList
360-----------------------
361
362Generate list of commands that are used in documentation comments.
363
364ArmNeon
365-------
366
367Generate arm_neon.h for clang.
368
369ArmNeonSema
370-----------
371
372Generate ARM NEON sema support for clang.
373
374ArmNeonTest
375-----------
376
377Generate ARM NEON tests for clang.
378
379AttrDocs
380--------
381
382Generate attribute documentation.
383
384How to write a back-end
385=======================
386
387TODO.
388
389Until we get a step-by-step HowTo for writing TableGen backends, you can at
390least grab the boilerplate (build system, new files, etc.) from Clang's
391r173931.
392
393TODO: How they work, how to write one. This section should not contain details
394about any particular backend, except maybe ``-print-enums`` as an example. This
395should highlight the APIs in ``TableGen/Record.h``.
396