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gerrit-public.fairphone.software / toolchain / llvm-project / 10e2b5dcaa75eb3bd6180b8d16aee58a8027ca19 / . / clang / test / CodeGen / builtins-ppc-p9vector.c
blob: de63712c8dee35f3e70e1f3369ce219f9377478f [file] [log] [blame]
Nemanja Ivanovic10e2b5d2016-09-27 10:45:22 +0000[diff] [blame^]1// REQUIRES: powerpc-registered-target
2// RUN: %clang_cc1 -faltivec -target-feature +power9-vector \
3// RUN: -triple powerpc64-unknown-unknown -emit-llvm %s \
4// RUN: -O2 -o - | FileCheck %s -check-prefix=CHECK-BE
5
6// RUN: %clang_cc1 -faltivec -target-feature +power9-vector \
7// RUN: -triple powerpc64le-unknown-unknown -emit-llvm %s \
8// RUN: -O2 -o - | FileCheck %s
9
10#include <altivec.h>
11
12vector signed char vsca, vscb;
13vector unsigned char vuca, vucb;
14vector bool char vbca, vbcb;
15vector signed short vssa, vssb;
16vector unsigned short vusa, vusb;
17vector bool short vbsa, vbsb;
18vector signed int vsia, vsib;
19vector unsigned int vuia, vuib;
20vector bool int vbia, vbib;
21vector signed long long vsla, vslb;
22vector unsigned long long vula, vulb;
23vector bool long long vbla, vblb;
24vector float vfa, vfb;
25vector double vda, vdb;
26
27unsigned test1(void) {
28// CHECK-BE: @llvm.ppc.altivec.vcmpequb(<16 x i8>
29// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
30// CHECK-BE: extractelement <2 x i64>
31// CHECK-BE: icmp eq i64 {{.*}}, 64
32// CHECK-BE: extractelement <2 x i64>
33// CHECK-BE: add i64 {{.*}}, 64
34// CHECK-BE: select i1
35// CHECK-BE: lshr i64 {{.*}}, 3
36// CHECK: @llvm.ppc.altivec.vcmpequb(<16 x i8>
37// CHECK: @llvm.cttz.v2i64(<2 x i64>
38// CHECK: extractelement <2 x i64>
39// CHECK: icmp eq i64 {{.*}}, 64
40// CHECK: extractelement <2 x i64>
41// CHECK: add i64 {{.*}}, 64
42// CHECK: select i1
43// CHECK: lshr i64 {{.*}}, 3
44 return vec_first_match_index (vsca, vscb);
45}
46unsigned test2(void) {
47// CHECK-BE: @llvm.ppc.altivec.vcmpequb(<16 x i8>
48// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
49// CHECK-BE: extractelement <2 x i64>
50// CHECK-BE: icmp eq i64 {{.*}}, 64
51// CHECK-BE: extractelement <2 x i64>
52// CHECK-BE: add i64 {{.*}}, 64
53// CHECK-BE: select i1
54// CHECK-BE: lshr i64 {{.*}}, 3
55// CHECK: @llvm.ppc.altivec.vcmpequb(<16 x i8>
56// CHECK: @llvm.cttz.v2i64(<2 x i64>
57// CHECK: extractelement <2 x i64>
58// CHECK: icmp eq i64 {{.*}}, 64
59// CHECK: extractelement <2 x i64>
60// CHECK: add i64 {{.*}}, 64
61// CHECK: select i1
62// CHECK: lshr i64 {{.*}}, 3
63 return vec_first_match_index (vuca, vucb);
64}
65unsigned test3(void) {
66// CHECK-BE: @llvm.ppc.altivec.vcmpequw(<4 x i32>
67// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
68// CHECK-BE: extractelement <2 x i64>
69// CHECK-BE: icmp eq i64 {{.*}}, 64
70// CHECK-BE: extractelement <2 x i64>
71// CHECK-BE: add i64 {{.*}}, 64
72// CHECK-BE: select i1
73// CHECK-BE: lshr i64 {{.*}}, 5
74// CHECK: @llvm.ppc.altivec.vcmpequw(<4 x i32>
75// CHECK: @llvm.cttz.v2i64(<2 x i64>
76// CHECK: extractelement <2 x i64>
77// CHECK: icmp eq i64 {{.*}}, 64
78// CHECK: extractelement <2 x i64>
79// CHECK: add i64 {{.*}}, 64
80// CHECK: select i1
81// CHECK: lshr i64 {{.*}}, 5
82 return vec_first_match_index (vsia, vsib);
83}
84unsigned test4(void) {
85// CHECK-BE: @llvm.ppc.altivec.vcmpequw(<4 x i32>
86// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
87// CHECK-BE: extractelement <2 x i64>
88// CHECK-BE: icmp eq i64 {{.*}}, 64
89// CHECK-BE: extractelement <2 x i64>
90// CHECK-BE: add i64 {{.*}}, 64
91// CHECK-BE: select i1
92// CHECK-BE: lshr i64 {{.*}}, 5
93// CHECK: @llvm.ppc.altivec.vcmpequw(<4 x i32>
94// CHECK: @llvm.cttz.v2i64(<2 x i64>
95// CHECK: extractelement <2 x i64>
96// CHECK: icmp eq i64 {{.*}}, 64
97// CHECK: extractelement <2 x i64>
98// CHECK: add i64 {{.*}}, 64
99// CHECK: select i1
100// CHECK: lshr i64 {{.*}}, 5
101 return vec_first_match_index (vuia, vuib);
102}
103unsigned test5(void) {
104// CHECK-BE: @llvm.ppc.altivec.vcmpequh(<8 x i16>
105// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
106// CHECK-BE: extractelement <2 x i64>
107// CHECK-BE: icmp eq i64 {{.*}}, 64
108// CHECK-BE: extractelement <2 x i64>
109// CHECK-BE: add i64 {{.*}}, 64
110// CHECK-BE: select i1
111// CHECK-BE: lshr i64 {{.*}}, 4
112// CHECK: @llvm.ppc.altivec.vcmpequh(<8 x i16>
113// CHECK: @llvm.cttz.v2i64(<2 x i64>
114// CHECK: extractelement <2 x i64>
115// CHECK: icmp eq i64 {{.*}}, 64
116// CHECK: extractelement <2 x i64>
117// CHECK: add i64 {{.*}}, 64
118// CHECK: select i1
119// CHECK: lshr i64 {{.*}}, 4
120 return vec_first_match_index (vssa, vssb);
121}
122unsigned test6(void) {
123// CHECK-BE: @llvm.ppc.altivec.vcmpequh(<8 x i16>
124// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
125// CHECK-BE: extractelement <2 x i64>
126// CHECK-BE: icmp eq i64 {{.*}}, 64
127// CHECK-BE: extractelement <2 x i64>
128// CHECK-BE: add i64 {{.*}}, 64
129// CHECK-BE: select i1
130// CHECK-BE: lshr i64 {{.*}}, 4
131// CHECK: @llvm.ppc.altivec.vcmpequh(<8 x i16>
132// CHECK: @llvm.cttz.v2i64(<2 x i64>
133// CHECK: extractelement <2 x i64>
134// CHECK: icmp eq i64 {{.*}}, 64
135// CHECK: extractelement <2 x i64>
136// CHECK: add i64 {{.*}}, 64
137// CHECK: select i1
138// CHECK: lshr i64 {{.*}}, 4
139 return vec_first_match_index (vusa, vusb);
140}
141unsigned test7(void) {
142// CHECK-BE: @llvm.ppc.altivec.vcmpequb(<16 x i8>
143// CHECK-BE: @llvm.ppc.altivec.vcmpequb(<16 x i8>
144// CHECK-BE: or <16 x i8>
145// CHECK-BE: @llvm.ppc.altivec.vcmpequb(<16 x i8>
146// CHECK-BE: or <16 x i8>
147// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
148// CHECK-BE: extractelement <2 x i64>
149// CHECK-BE: icmp eq i64 {{.*}}, 64
150// CHECK-BE: extractelement <2 x i64>
151// CHECK-BE: add i64 {{.*}}, 64
152// CHECK-BE: select i1
153// CHECK-BE: lshr i64 {{.*}}, 3
154// CHECK: @llvm.ppc.altivec.vcmpequb(<16 x i8>
155// CHECK: @llvm.ppc.altivec.vcmpequb(<16 x i8>
156// CHECK: or <16 x i8>
157// CHECK: @llvm.ppc.altivec.vcmpequb(<16 x i8>
158// CHECK: or <16 x i8>
159// CHECK: @llvm.cttz.v2i64(<2 x i64>
160// CHECK: extractelement <2 x i64>
161// CHECK: icmp eq i64 {{.*}}, 64
162// CHECK: extractelement <2 x i64>
163// CHECK: add i64 {{.*}}, 64
164// CHECK: select i1
165// CHECK: lshr i64 {{.*}}, 3
166 return vec_first_match_or_eos_index (vsca, vscb);
167}
168unsigned test8(void) {
169// CHECK-BE: @llvm.ppc.altivec.vcmpequb(<16 x i8>
170// CHECK-BE: @llvm.ppc.altivec.vcmpequb(<16 x i8>
171// CHECK-BE: or <16 x i8>
172// CHECK-BE: @llvm.ppc.altivec.vcmpequb(<16 x i8>
173// CHECK-BE: or <16 x i8>
174// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
175// CHECK-BE: extractelement <2 x i64>
176// CHECK-BE: icmp eq i64 {{.*}}, 64
177// CHECK-BE: extractelement <2 x i64>
178// CHECK-BE: add i64 {{.*}}, 64
179// CHECK-BE: select i1
180// CHECK-BE: lshr i64 {{.*}}, 3
181// CHECK: @llvm.ppc.altivec.vcmpequb(<16 x i8>
182// CHECK: @llvm.ppc.altivec.vcmpequb(<16 x i8>
183// CHECK: or <16 x i8>
184// CHECK: @llvm.ppc.altivec.vcmpequb(<16 x i8>
185// CHECK: or <16 x i8>
186// CHECK: @llvm.cttz.v2i64(<2 x i64>
187// CHECK: extractelement <2 x i64>
188// CHECK: icmp eq i64 {{.*}}, 64
189// CHECK: extractelement <2 x i64>
190// CHECK: add i64 {{.*}}, 64
191// CHECK: select i1
192// CHECK: lshr i64 {{.*}}, 3
193 return vec_first_match_or_eos_index (vuca, vucb);
194}
195unsigned test9(void) {
196// CHECK-BE: @llvm.ppc.altivec.vcmpequw(<4 x i32>
197// CHECK-BE: @llvm.ppc.altivec.vcmpequw(<4 x i32>
198// CHECK-BE: or <4 x i32>
199// CHECK-BE: @llvm.ppc.altivec.vcmpequw(<4 x i32>
200// CHECK-BE: or <4 x i32>
201// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
202// CHECK-BE: extractelement <2 x i64>
203// CHECK-BE: icmp eq i64 {{.*}}, 64
204// CHECK-BE: extractelement <2 x i64>
205// CHECK-BE: add i64 {{.*}}, 64
206// CHECK-BE: select i1
207// CHECK-BE: lshr i64 {{.*}}, 5
208// CHECK: @llvm.ppc.altivec.vcmpequw(<4 x i32>
209// CHECK: @llvm.ppc.altivec.vcmpequw(<4 x i32>
210// CHECK: or <4 x i32>
211// CHECK: @llvm.ppc.altivec.vcmpequw(<4 x i32>
212// CHECK: or <4 x i32>
213// CHECK: @llvm.cttz.v2i64(<2 x i64>
214// CHECK: extractelement <2 x i64>
215// CHECK: icmp eq i64 {{.*}}, 64
216// CHECK: extractelement <2 x i64>
217// CHECK: add i64 {{.*}}, 64
218// CHECK: select i1
219// CHECK: lshr i64 {{.*}}, 5
220 return vec_first_match_or_eos_index (vsia, vsib);
221}
222unsigned test10(void) {
223// CHECK-BE: @llvm.ppc.altivec.vcmpequw(<4 x i32>
224// CHECK-BE: @llvm.ppc.altivec.vcmpequw(<4 x i32>
225// CHECK-BE: or <4 x i32>
226// CHECK-BE: @llvm.ppc.altivec.vcmpequw(<4 x i32>
227// CHECK-BE: or <4 x i32>
228// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
229// CHECK-BE: extractelement <2 x i64>
230// CHECK-BE: icmp eq i64 {{.*}}, 64
231// CHECK-BE: extractelement <2 x i64>
232// CHECK-BE: add i64 {{.*}}, 64
233// CHECK-BE: select i1
234// CHECK-BE: lshr i64 {{.*}}, 5
235// CHECK: @llvm.ppc.altivec.vcmpequw(<4 x i32>
236// CHECK: @llvm.ppc.altivec.vcmpequw(<4 x i32>
237// CHECK: or <4 x i32>
238// CHECK: @llvm.ppc.altivec.vcmpequw(<4 x i32>
239// CHECK: or <4 x i32>
240// CHECK: @llvm.cttz.v2i64(<2 x i64>
241// CHECK: extractelement <2 x i64>
242// CHECK: icmp eq i64 {{.*}}, 64
243// CHECK: extractelement <2 x i64>
244// CHECK: add i64 {{.*}}, 64
245// CHECK: select i1
246// CHECK: lshr i64 {{.*}}, 5
247 return vec_first_match_or_eos_index (vuia, vuib);
248}
249unsigned test11(void) {
250// CHECK-BE: @llvm.ppc.altivec.vcmpequh(<8 x i16>
251// CHECK-BE: @llvm.ppc.altivec.vcmpequh(<8 x i16>
252// CHECK-BE: or <8 x i16>
253// CHECK-BE: @llvm.ppc.altivec.vcmpequh(<8 x i16>
254// CHECK-BE: or <8 x i16>
255// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
256// CHECK-BE: extractelement <2 x i64>
257// CHECK-BE: icmp eq i64 {{.*}}, 64
258// CHECK-BE: extractelement <2 x i64>
259// CHECK-BE: add i64 {{.*}}, 64
260// CHECK-BE: select i1
261// CHECK-BE: lshr i64 {{.*}}, 4
262// CHECK: @llvm.ppc.altivec.vcmpequh(<8 x i16>
263// CHECK: @llvm.ppc.altivec.vcmpequh(<8 x i16>
264// CHECK: or <8 x i16>
265// CHECK: @llvm.ppc.altivec.vcmpequh(<8 x i16>
266// CHECK: or <8 x i16>
267// CHECK: @llvm.cttz.v2i64(<2 x i64>
268// CHECK: extractelement <2 x i64>
269// CHECK: icmp eq i64 {{.*}}, 64
270// CHECK: extractelement <2 x i64>
271// CHECK: add i64 {{.*}}, 64
272// CHECK: select i1
273// CHECK: lshr i64 {{.*}}, 4
274 return vec_first_match_or_eos_index (vssa, vssb);
275}
276unsigned test12(void) {
277// CHECK-BE: @llvm.ppc.altivec.vcmpequh(<8 x i16>
278// CHECK-BE: @llvm.ppc.altivec.vcmpequh(<8 x i16>
279// CHECK-BE: or <8 x i16>
280// CHECK-BE: @llvm.ppc.altivec.vcmpequh(<8 x i16>
281// CHECK-BE: or <8 x i16>
282// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
283// CHECK-BE: extractelement <2 x i64>
284// CHECK-BE: icmp eq i64 {{.*}}, 64
285// CHECK-BE: extractelement <2 x i64>
286// CHECK-BE: add i64 {{.*}}, 64
287// CHECK-BE: select i1
288// CHECK-BE: lshr i64 {{.*}}, 4
289// CHECK: @llvm.ppc.altivec.vcmpequh(<8 x i16>
290// CHECK: @llvm.ppc.altivec.vcmpequh(<8 x i16>
291// CHECK: or <8 x i16>
292// CHECK: @llvm.ppc.altivec.vcmpequh(<8 x i16>
293// CHECK: or <8 x i16>
294// CHECK: @llvm.cttz.v2i64(<2 x i64>
295// CHECK: extractelement <2 x i64>
296// CHECK: icmp eq i64 {{.*}}, 64
297// CHECK: extractelement <2 x i64>
298// CHECK: add i64 {{.*}}, 64
299// CHECK: select i1
300// CHECK: lshr i64 {{.*}}, 4
301 return vec_first_match_or_eos_index (vusa, vusb);
302}
303unsigned test13(void) {
304// CHECK-BE: @llvm.ppc.altivec.vcmpneb(<16 x i8>
305// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
306// CHECK-BE: extractelement <2 x i64>
307// CHECK-BE: icmp eq i64 {{.*}}, 64
308// CHECK-BE: extractelement <2 x i64>
309// CHECK-BE: add i64 {{.*}}, 64
310// CHECK-BE: select i1
311// CHECK-BE: lshr i64 {{.*}}, 3
312// CHECK: @llvm.ppc.altivec.vcmpneb(<16 x i8>
313// CHECK: @llvm.cttz.v2i64(<2 x i64>
314// CHECK: extractelement <2 x i64>
315// CHECK: icmp eq i64 {{.*}}, 64
316// CHECK: extractelement <2 x i64>
317// CHECK: add i64 {{.*}}, 64
318// CHECK: select i1
319// CHECK: lshr i64 {{.*}}, 3
320 return vec_first_mismatch_index (vsca, vscb);
321}
322unsigned test14(void) {
323// CHECK-BE: @llvm.ppc.altivec.vcmpneb(<16 x i8>
324// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
325// CHECK-BE: extractelement <2 x i64>
326// CHECK-BE: icmp eq i64 {{.*}}, 64
327// CHECK-BE: extractelement <2 x i64>
328// CHECK-BE: add i64 {{.*}}, 64
329// CHECK-BE: select i1
330// CHECK-BE: lshr i64 {{.*}}, 3
331// CHECK: @llvm.ppc.altivec.vcmpneb(<16 x i8>
332// CHECK: @llvm.cttz.v2i64(<2 x i64>
333// CHECK: extractelement <2 x i64>
334// CHECK: icmp eq i64 {{.*}}, 64
335// CHECK: extractelement <2 x i64>
336// CHECK: add i64 {{.*}}, 64
337// CHECK: select i1
338// CHECK: lshr i64 {{.*}}, 3
339 return vec_first_mismatch_index (vuca, vucb);
340}
341unsigned test15(void) {
342// CHECK-BE: @llvm.ppc.altivec.vcmpnew(<4 x i32>
343// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
344// CHECK-BE: extractelement <2 x i64>
345// CHECK-BE: icmp eq i64 {{.*}}, 64
346// CHECK-BE: extractelement <2 x i64>
347// CHECK-BE: add i64 {{.*}}, 64
348// CHECK-BE: select i1
349// CHECK-BE: lshr i64 {{.*}}, 5
350// CHECK: @llvm.ppc.altivec.vcmpnew(<4 x i32>
351// CHECK: @llvm.cttz.v2i64(<2 x i64>
352// CHECK: extractelement <2 x i64>
353// CHECK: icmp eq i64 {{.*}}, 64
354// CHECK: extractelement <2 x i64>
355// CHECK: add i64 {{.*}}, 64
356// CHECK: select i1
357// CHECK: lshr i64 {{.*}}, 5
358 return vec_first_mismatch_index (vsia, vsib);
359}
360unsigned test16(void) {
361// CHECK-BE: @llvm.ppc.altivec.vcmpnew(<4 x i32>
362// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
363// CHECK-BE: extractelement <2 x i64>
364// CHECK-BE: icmp eq i64 {{.*}}, 64
365// CHECK-BE: extractelement <2 x i64>
366// CHECK-BE: add i64 {{.*}}, 64
367// CHECK-BE: select i1
368// CHECK-BE: lshr i64 {{.*}}, 5
369// CHECK: @llvm.ppc.altivec.vcmpnew(<4 x i32>
370// CHECK: @llvm.cttz.v2i64(<2 x i64>
371// CHECK: extractelement <2 x i64>
372// CHECK: icmp eq i64 {{.*}}, 64
373// CHECK: extractelement <2 x i64>
374// CHECK: add i64 {{.*}}, 64
375// CHECK: select i1
376// CHECK: lshr i64 {{.*}}, 5
377 return vec_first_mismatch_index (vuia, vuib);
378}
379unsigned test17(void) {
380// CHECK-BE: @llvm.ppc.altivec.vcmpneh(<8 x i16>
381// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
382// CHECK-BE: extractelement <2 x i64>
383// CHECK-BE: icmp eq i64 {{.*}}, 64
384// CHECK-BE: extractelement <2 x i64>
385// CHECK-BE: add i64 {{.*}}, 64
386// CHECK-BE: select i1
387// CHECK-BE: lshr i64 {{.*}}, 4
388// CHECK: @llvm.ppc.altivec.vcmpneh(<8 x i16>
389// CHECK: @llvm.cttz.v2i64(<2 x i64>
390// CHECK: extractelement <2 x i64>
391// CHECK: icmp eq i64 {{.*}}, 64
392// CHECK: extractelement <2 x i64>
393// CHECK: add i64 {{.*}}, 64
394// CHECK: select i1
395// CHECK: lshr i64 {{.*}}, 4
396 return vec_first_mismatch_index (vssa, vssb);
397}
398unsigned test18(void) {
399// CHECK-BE: @llvm.ppc.altivec.vcmpneh(<8 x i16>
400// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
401// CHECK-BE: extractelement <2 x i64>
402// CHECK-BE: icmp eq i64 {{.*}}, 64
403// CHECK-BE: extractelement <2 x i64>
404// CHECK-BE: add i64 {{.*}}, 64
405// CHECK-BE: select i1
406// CHECK-BE: lshr i64 {{.*}}, 4
407// CHECK: @llvm.ppc.altivec.vcmpneh(<8 x i16>
408// CHECK: @llvm.cttz.v2i64(<2 x i64>
409// CHECK: extractelement <2 x i64>
410// CHECK: icmp eq i64 {{.*}}, 64
411// CHECK: extractelement <2 x i64>
412// CHECK: add i64 {{.*}}, 64
413// CHECK: select i1
414// CHECK: lshr i64 {{.*}}, 4
415 return vec_first_mismatch_index (vusa, vusb);
416}
417unsigned test19(void) {
418// CHECK-BE: @llvm.ppc.altivec.vcmpnezb(<16 x i8>
419// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
420// CHECK-BE: extractelement <2 x i64>
421// CHECK-BE: icmp eq i64 {{.*}}, 64
422// CHECK-BE: extractelement <2 x i64>
423// CHECK-BE: add i64 {{.*}}, 64
424// CHECK-BE: select i1
425// CHECK-BE: lshr i64 {{.*}}, 3
426// CHECK: @llvm.ppc.altivec.vcmpnezb(<16 x i8>
427// CHECK: @llvm.cttz.v2i64(<2 x i64>
428// CHECK: extractelement <2 x i64>
429// CHECK: icmp eq i64 {{.*}}, 64
430// CHECK: extractelement <2 x i64>
431// CHECK: add i64 {{.*}}, 64
432// CHECK: select i1
433// CHECK: lshr i64 {{.*}}, 3
434 return vec_first_mismatch_or_eos_index (vsca, vscb);
435}
436unsigned test20(void) {
437// CHECK-BE: @llvm.ppc.altivec.vcmpnezb(<16 x i8>
438// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
439// CHECK-BE: extractelement <2 x i64>
440// CHECK-BE: icmp eq i64 {{.*}}, 64
441// CHECK-BE: extractelement <2 x i64>
442// CHECK-BE: add i64 {{.*}}, 64
443// CHECK-BE: select i1
444// CHECK-BE: lshr i64 {{.*}}, 3
445// CHECK: @llvm.ppc.altivec.vcmpnezb(<16 x i8>
446// CHECK: @llvm.cttz.v2i64(<2 x i64>
447// CHECK: extractelement <2 x i64>
448// CHECK: icmp eq i64 {{.*}}, 64
449// CHECK: extractelement <2 x i64>
450// CHECK: add i64 {{.*}}, 64
451// CHECK: select i1
452// CHECK: lshr i64 {{.*}}, 3
453 return vec_first_mismatch_or_eos_index (vuca, vucb);
454}
455unsigned test21(void) {
456// CHECK-BE: @llvm.ppc.altivec.vcmpnezw(<4 x i32>
457// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
458// CHECK-BE: extractelement <2 x i64>
459// CHECK-BE: icmp eq i64 {{.*}}, 64
460// CHECK-BE: extractelement <2 x i64>
461// CHECK-BE: add i64 {{.*}}, 64
462// CHECK-BE: select i1
463// CHECK-BE: lshr i64 {{.*}}, 5
464// CHECK: @llvm.ppc.altivec.vcmpnezw(<4 x i32>
465// CHECK: @llvm.cttz.v2i64(<2 x i64>
466// CHECK: extractelement <2 x i64>
467// CHECK: icmp eq i64 {{.*}}, 64
468// CHECK: extractelement <2 x i64>
469// CHECK: add i64 {{.*}}, 64
470// CHECK: select i1
471// CHECK: lshr i64 {{.*}}, 5
472 return vec_first_mismatch_or_eos_index (vsia, vsib);
473}
474unsigned test22(void) {
475// CHECK-BE: @llvm.ppc.altivec.vcmpnezw(<4 x i32>
476// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
477// CHECK-BE: extractelement <2 x i64>
478// CHECK-BE: icmp eq i64 {{.*}}, 64
479// CHECK-BE: extractelement <2 x i64>
480// CHECK-BE: add i64 {{.*}}, 64
481// CHECK-BE: select i1
482// CHECK-BE: lshr i64 {{.*}}, 5
483// CHECK: @llvm.ppc.altivec.vcmpnezw(<4 x i32>
484// CHECK: @llvm.cttz.v2i64(<2 x i64>
485// CHECK: extractelement <2 x i64>
486// CHECK: icmp eq i64 {{.*}}, 64
487// CHECK: extractelement <2 x i64>
488// CHECK: add i64 {{.*}}, 64
489// CHECK: select i1
490// CHECK: lshr i64 {{.*}}, 5
491 return vec_first_mismatch_or_eos_index (vuia, vuib);
492}
493unsigned test23(void) {
494// CHECK-BE: @llvm.ppc.altivec.vcmpnezh(<8 x i16>
495// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
496// CHECK-BE: extractelement <2 x i64>
497// CHECK-BE: icmp eq i64 {{.*}}, 64
498// CHECK-BE: extractelement <2 x i64>
499// CHECK-BE: add i64 {{.*}}, 64
500// CHECK-BE: select i1
501// CHECK-BE: lshr i64 {{.*}}, 4
502// CHECK: @llvm.ppc.altivec.vcmpnezh(<8 x i16>
503// CHECK: @llvm.cttz.v2i64(<2 x i64>
504// CHECK: extractelement <2 x i64>
505// CHECK: icmp eq i64 {{.*}}, 64
506// CHECK: extractelement <2 x i64>
507// CHECK: add i64 {{.*}}, 64
508// CHECK: select i1
509// CHECK: lshr i64 {{.*}}, 4
510 return vec_first_mismatch_or_eos_index (vssa, vssb);
511}
512unsigned test24(void) {
513// CHECK-BE: @llvm.ppc.altivec.vcmpnezh(<8 x i16>
514// CHECK-BE: @llvm.ctlz.v2i64(<2 x i64>
515// CHECK-BE: extractelement <2 x i64>
516// CHECK-BE: icmp eq i64 {{.*}}, 64
517// CHECK-BE: extractelement <2 x i64>
518// CHECK-BE: add i64 {{.*}}, 64
519// CHECK-BE: select i1
520// CHECK-BE: lshr i64 {{.*}}, 4
521// CHECK: @llvm.ppc.altivec.vcmpnezh(<8 x i16>
522// CHECK: @llvm.cttz.v2i64(<2 x i64>
523// CHECK: extractelement <2 x i64>
524// CHECK: icmp eq i64 {{.*}}, 64
525// CHECK: extractelement <2 x i64>
526// CHECK: add i64 {{.*}}, 64
527// CHECK: select i1
528// CHECK: lshr i64 {{.*}}, 4
529 return vec_first_mismatch_or_eos_index (vusa, vusb);
530}
531vector bool char test25(void) {
532// CHECK-BE: @llvm.ppc.altivec.vcmpneb(<16 x i8>
533// CHECK-BE-NEXT: ret <16 x i8>
534// CHECK: @llvm.ppc.altivec.vcmpneb(<16 x i8>
535// CHECK-NEXT: ret <16 x i8>
536 return vec_cmpne (vbca, vbcb);
537}
538vector bool char test26(void) {
539// CHECK-BE: @llvm.ppc.altivec.vcmpneb(<16 x i8>
540// CHECK-BE-NEXT: ret <16 x i8>
541// CHECK: @llvm.ppc.altivec.vcmpneb(<16 x i8>
542// CHECK-NEXT: ret <16 x i8>
543 return vec_cmpne (vsca, vscb);
544}
545vector bool char test27(void) {
546// CHECK-BE: @llvm.ppc.altivec.vcmpneb(<16 x i8>
547// CHECK-BE-NEXT: ret <16 x i8>
548// CHECK: @llvm.ppc.altivec.vcmpneb(<16 x i8>
549// CHECK-NEXT: ret <16 x i8>
550 return vec_cmpne (vuca, vucb);
551}
552vector bool int test28(void) {
553// CHECK-BE: @llvm.ppc.altivec.vcmpnew(<4 x i32>
554// CHECK-BE-NEXT: ret <4 x i32>
555// CHECK: @llvm.ppc.altivec.vcmpnew(<4 x i32>
556// CHECK-NEXT: ret <4 x i32>
557 return vec_cmpne (vbia, vbib);
558}
559vector bool int test29(void) {
560// CHECK-BE: @llvm.ppc.altivec.vcmpnew(<4 x i32>
561// CHECK-BE-NEXT: ret <4 x i32>
562// CHECK: @llvm.ppc.altivec.vcmpnew(<4 x i32>
563// CHECK-NEXT: ret <4 x i32>
564 return vec_cmpne (vsia, vsib);
565}
566vector bool int test30(void) {
567// CHECK-BE: @llvm.ppc.altivec.vcmpnew(<4 x i32>
568// CHECK-BE-NEXT: ret <4 x i32>
569// CHECK: @llvm.ppc.altivec.vcmpnew(<4 x i32>
570// CHECK-NEXT: ret <4 x i32>
571 return vec_cmpne (vuia, vuib);
572}
573vector bool long long test31(void) {
574// CHECK-BE: @llvm.ppc.altivec.vcmpequd(<2 x i64>
575// CHECK-BE: xor <2 x i64>
576// CHECK-BE-NEXT: ret <2 x i64>
577// CHECK: @llvm.ppc.altivec.vcmpequd(<2 x i64>
578// CHECK: xor <2 x i64>
579// CHECK-NEXT: ret <2 x i64>
580 return vec_cmpne (vbla, vblb);
581}
582vector bool long long test32(void) {
583// CHECK-BE: @llvm.ppc.altivec.vcmpequd(<2 x i64>
584// CHECK-BE: xor <2 x i64>
585// CHECK-BE-NEXT: ret <2 x i64>
586// CHECK: @llvm.ppc.altivec.vcmpequd(<2 x i64>
587// CHECK: xor <2 x i64>
588// CHECK-NEXT: ret <2 x i64>
589 return vec_cmpne (vsla, vslb);
590}
591vector bool long long test33(void) {
592// CHECK-BE: @llvm.ppc.altivec.vcmpequd(<2 x i64>
593// CHECK-BE: xor <2 x i64>
594// CHECK-BE-NEXT: ret <2 x i64>
595// CHECK: @llvm.ppc.altivec.vcmpequd(<2 x i64>
596// CHECK: xor <2 x i64>
597// CHECK-NEXT: ret <2 x i64>
598 return vec_cmpne (vula, vulb);
599}
600vector bool short test34(void) {
601// CHECK-BE: @llvm.ppc.altivec.vcmpneh(<8 x i16>
602// CHECK-BE-NEXT: ret <8 x i16>
603// CHECK: @llvm.ppc.altivec.vcmpneh(<8 x i16>
604// CHECK-NEXT: ret <8 x i16>
605 return vec_cmpne (vbsa, vbsb);
606}
607vector bool short test35(void) {
608// CHECK-BE: @llvm.ppc.altivec.vcmpneh(<8 x i16>
609// CHECK-BE-NEXT: ret <8 x i16>
610// CHECK: @llvm.ppc.altivec.vcmpneh(<8 x i16>
611// CHECK-NEXT: ret <8 x i16>
612 return vec_cmpne (vssa, vssb);
613}
614vector bool short test36(void) {
615// CHECK-BE: @llvm.ppc.altivec.vcmpneh(<8 x i16>
616// CHECK-BE-NEXT: ret <8 x i16>
617// CHECK: @llvm.ppc.altivec.vcmpneh(<8 x i16>
618// CHECK-NEXT: ret <8 x i16>
619 return vec_cmpne (vusa, vusb);
620}
621vector bool long long test37(void) {
622// CHECK-BE: @llvm.ppc.altivec.vcmpequd(<2 x i64>
623// CHECK-BE: xor <2 x i64>
624// CHECK-BE-NEXT: ret <2 x i64>
625// CHECK: @llvm.ppc.altivec.vcmpequd(<2 x i64>
626// CHECK: xor <2 x i64>
627// CHECK-NEXT: ret <2 x i64>
628 return vec_cmpne (vda, vdb);
629}
630vector bool int test38(void) {
631// CHECK-BE: @llvm.ppc.altivec.vcmpnew(<4 x i32>
632// CHECK-BE-NEXT: ret <4 x i32>
633// CHECK: @llvm.ppc.altivec.vcmpnew(<4 x i32>
634// CHECK-NEXT: ret <4 x i32>
635 return vec_cmpne (vfa, vfb);
636}
637vector signed char test39(void) {
638// CHECK-BE: @llvm.cttz.v16i8(<16 x i8>
639// CHECK-BE-NEXT: ret <16 x i8>
640// CHECK: @llvm.cttz.v16i8(<16 x i8>
641// CHECK-NEXT: ret <16 x i8>
642 return vec_cnttz (vsca);
643}
644vector unsigned char test40(void) {
645// CHECK-BE: @llvm.cttz.v16i8(<16 x i8>
646// CHECK-BE-NEXT: ret <16 x i8>
647// CHECK: @llvm.cttz.v16i8(<16 x i8>
648// CHECK-NEXT: ret <16 x i8>
649 return vec_cnttz (vuca);
650}
651vector signed int test41(void) {
652// CHECK-BE: @llvm.cttz.v4i32(<4 x i32>
653// CHECK-BE-NEXT: ret <4 x i32>
654// CHECK: @llvm.cttz.v4i32(<4 x i32>
655// CHECK-NEXT: ret <4 x i32>
656 return vec_cnttz (vsia);
657}
658vector unsigned int test42(void) {
659// CHECK-BE: @llvm.cttz.v4i32(<4 x i32>
660// CHECK-BE-NEXT: ret <4 x i32>
661// CHECK: @llvm.cttz.v4i32(<4 x i32>
662// CHECK-NEXT: ret <4 x i32>
663 return vec_cnttz (vuia);
664}
665vector signed long long test43(void) {
666// CHECK-BE: @llvm.cttz.v2i64(<2 x i64>
667// CHECK-BE-NEXT: ret <2 x i64>
668// CHECK: @llvm.cttz.v2i64(<2 x i64>
669// CHECK-NEXT: ret <2 x i64>
670 return vec_cnttz (vsla);
671}
672vector unsigned long long test44(void) {
673// CHECK-BE: @llvm.cttz.v2i64(<2 x i64>
674// CHECK-BE-NEXT: ret <2 x i64>
675// CHECK: @llvm.cttz.v2i64(<2 x i64>
676// CHECK-NEXT: ret <2 x i64>
677 return vec_cnttz (vula);
678}
679vector signed short test45(void) {
680// CHECK-BE: @llvm.cttz.v8i16(<8 x i16>
681// CHECK-BE-NEXT: ret <8 x i16>
682// CHECK: @llvm.cttz.v8i16(<8 x i16>
683// CHECK-NEXT: ret <8 x i16>
684 return vec_cnttz (vssa);
685}
686vector unsigned short test46(void) {
687// CHECK-BE: @llvm.cttz.v8i16(<8 x i16>
688// CHECK-BE-NEXT: ret <8 x i16>
689// CHECK: @llvm.cttz.v8i16(<8 x i16>
690// CHECK-NEXT: ret <8 x i16>
691 return vec_cnttz (vusa);
692}
693vector unsigned char test47(void) {
694// CHECK-BE: @llvm.ctpop.v16i8(<16 x i8>
695// CHECK-BE-NEXT: ret <16 x i8>
696// CHECK: @llvm.ctpop.v16i8(<16 x i8>
697// CHECK-NEXT: ret <16 x i8>
698 return vec_popcnt (vsca);
699}
700vector unsigned char test48(void) {
701// CHECK-BE: @llvm.ctpop.v16i8(<16 x i8>
702// CHECK-BE-NEXT: ret <16 x i8>
703// CHECK: @llvm.ctpop.v16i8(<16 x i8>
704// CHECK-NEXT: ret <16 x i8>
705 return vec_popcnt (vuca);
706}
707vector unsigned int test49(void) {
708// CHECK-BE: @llvm.ctpop.v4i32(<4 x i32>
709// CHECK-BE-NEXT: ret <4 x i32>
710// CHECK: @llvm.ctpop.v4i32(<4 x i32>
711// CHECK-NEXT: ret <4 x i32>
712 return vec_popcnt (vsia);
713}
714vector unsigned int test50(void) {
715// CHECK-BE: @llvm.ctpop.v4i32(<4 x i32>
716// CHECK-BE-NEXT: ret <4 x i32>
717// CHECK: @llvm.ctpop.v4i32(<4 x i32>
718// CHECK-NEXT: ret <4 x i32>
719 return vec_popcnt (vuia);
720}
721vector unsigned long long test51(void) {
722// CHECK-BE: @llvm.ctpop.v2i64(<2 x i64>
723// CHECK-BE-NEXT: ret <2 x i64>
724// CHECK: @llvm.ctpop.v2i64(<2 x i64>
725// CHECK-NEXT: ret <2 x i64>
726 return vec_popcnt (vsla);
727}
728vector unsigned long long test52(void) {
729// CHECK-BE: @llvm.ctpop.v2i64(<2 x i64>
730// CHECK-BE-NEXT: ret <2 x i64>
731// CHECK: @llvm.ctpop.v2i64(<2 x i64>
732// CHECK-NEXT: ret <2 x i64>
733 return vec_popcnt (vula);
734}
735vector unsigned short test53(void) {
736// CHECK-BE: @llvm.ctpop.v8i16(<8 x i16>
737// CHECK-BE-NEXT: ret <8 x i16>
738// CHECK: @llvm.ctpop.v8i16(<8 x i16>
739// CHECK-NEXT: ret <8 x i16>
740 return vec_popcnt (vssa);
741}
742vector unsigned short test54(void) {
743// CHECK-BE: @llvm.ctpop.v8i16(<8 x i16>
744// CHECK-BE-NEXT: ret <8 x i16>
745// CHECK: @llvm.ctpop.v8i16(<8 x i16>
746// CHECK-NEXT: ret <8 x i16>
747 return vec_popcnt (vusa);
748}