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Chris Lattnerd92fb002002-10-25 22:55:53 +00001//===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
Misha Brukmanc88330a2005-04-21 23:38:14 +00002//
John Criswell29265fe2003-10-21 15:17:13 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattnerf3ebc3f2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukmanc88330a2005-04-21 23:38:14 +00007//
John Criswell29265fe2003-10-21 15:17:13 +00008//===----------------------------------------------------------------------===//
Chris Lattnerd92fb002002-10-25 22:55:53 +00009//
10// This file contains the entry points for global functions defined in the x86
11// target library, as used by the LLVM JIT.
12//
Chris Lattnerd92fb002002-10-25 22:55:53 +000013//===----------------------------------------------------------------------===//
14
Benjamin Kramera7c40ef2014-08-13 16:26:38 +000015#ifndef LLVM_LIB_TARGET_X86_X86_H
16#define LLVM_LIB_TARGET_X86_X86_H
Chris Lattnerd92fb002002-10-25 22:55:53 +000017
Craig Topperc6d4efa2014-03-19 06:53:25 +000018#include "llvm/Support/CodeGen.h"
Bill Wendling026e5d72009-04-29 23:29:43 +000019
Brian Gaeke960707c2003-11-11 22:41:34 +000020namespace llvm {
21
Brian Gaeke1a6f2b82003-08-13 18:15:29 +000022class FunctionPass;
Craig Topperc6d4efa2014-03-19 06:53:25 +000023class ImmutablePass;
Daniel Sanders0b5293f2017-04-06 09:49:34 +000024class InstructionSelector;
Ahmed Bougacha068ac4a2016-05-07 01:11:10 +000025class PassRegistry;
Daniel Sanders0b5293f2017-04-06 09:49:34 +000026class X86RegisterBankInfo;
27class X86Subtarget;
Daniel Dunbar40eb7f02010-02-21 21:54:14 +000028class X86TargetMachine;
Chris Lattnerd92fb002002-10-25 22:55:53 +000029
Sanjay Patela6bdd702015-12-07 19:31:34 +000030/// This pass converts a legalized DAG into a X86-specific DAG, ready for
31/// instruction scheduling.
Bruno Cardoso Lopes9fd794b2009-06-01 19:57:37 +000032FunctionPass *createX86ISelDag(X86TargetMachine &TM,
33 CodeGenOpt::Level OptLevel);
Chris Lattnerff9e21c2005-01-07 07:48:33 +000034
Sanjay Patela6bdd702015-12-07 19:31:34 +000035/// This pass initializes a global base register for PIC on x86-32.
Andrey Turetskiyfed110f2016-01-12 13:34:11 +000036FunctionPass *createX86GlobalBaseRegPass();
Dan Gohmand7b5ce32010-07-10 09:00:22 +000037
Sanjay Patela6bdd702015-12-07 19:31:34 +000038/// This pass combines multiple accesses to local-dynamic TLS variables so that
39/// the TLS base address for the module is only fetched once per execution path
40/// through the function.
Hans Wennborg789acfb2012-06-01 16:27:21 +000041FunctionPass *createCleanupLocalDynamicTLSPass();
42
Sanjay Patela6bdd702015-12-07 19:31:34 +000043/// This function returns a pass which converts floating-point register
44/// references and pseudo instructions into floating-point stack references and
45/// physical instructions.
Brian Gaeke1a6f2b82003-08-13 18:15:29 +000046FunctionPass *createX86FloatingPointStackifierPass();
Chris Lattner02a3d832002-10-29 22:37:54 +000047
Sanjay Patela6bdd702015-12-07 19:31:34 +000048/// This pass inserts AVX vzeroupper instructions before each call to avoid
49/// transition penalty between functions encoded with AVX and SSE.
Bruno Cardoso Lopes2a3ffb52011-08-23 01:14:17 +000050FunctionPass *createX86IssueVZeroUpperPass();
51
Sanjay Patela6bdd702015-12-07 19:31:34 +000052/// Return a pass that pads short functions with NOOPs.
53/// This will prevent a stall when returning on the Atom.
Preston Gurda01daac2013-01-08 18:27:24 +000054FunctionPass *createX86PadShortFunctions();
Sanjay Patela6bdd702015-12-07 19:31:34 +000055
Andrey Turetskiyfed110f2016-01-12 13:34:11 +000056/// Return a pass that selectively replaces certain instructions (like add,
Sanjay Patela6bdd702015-12-07 19:31:34 +000057/// sub, inc, dec, some shifts, and some multiplies) by equivalent LEA
58/// instructions, in order to eliminate execution delays in some processors.
Preston Gurd8b7ab4b2013-04-25 20:29:37 +000059FunctionPass *createX86FixupLEAs();
Preston Gurda01daac2013-01-08 18:27:24 +000060
Andrey Turetskiy1ce2c992016-01-13 11:30:44 +000061/// Return a pass that removes redundant LEA instructions and redundant address
62/// recalculations.
Alexey Bataev7cf32472015-12-04 10:53:15 +000063FunctionPass *createX86OptimizeLEAs();
64
Michael Kuperstein3e3652a2016-07-07 22:50:23 +000065/// Return a pass that transforms setcc + movzx pairs into xor + setcc.
66FunctionPass *createX86FixupSetCC();
67
Hans Wennborg8eb336c2016-05-18 16:10:17 +000068/// Return a pass that expands WinAlloca pseudo-instructions.
69FunctionPass *createX86WinAllocaExpander();
70
Sanjay Patela6bdd702015-12-07 19:31:34 +000071/// Return a pass that optimizes the code-size of x86 call sequences. This is
72/// done by replacing esp-relative movs with pushes.
Michael Kuperstein13fbd452015-02-01 16:56:04 +000073FunctionPass *createX86CallFrameOptimization();
74
Sanjay Patela6bdd702015-12-07 19:31:34 +000075/// Return an IR pass that inserts EH registration stack objects and explicit
76/// EH state updates. This pass must run after EH preparation, which does
77/// Windows-specific but architecture-neutral preparation.
Reid Kleckner0738a9c2015-05-05 17:44:16 +000078FunctionPass *createX86WinEHStatePass();
79
Quentin Colombet494eb602015-05-22 18:10:47 +000080/// Return a Machine IR pass that expands X86-specific pseudo
81/// instructions into a sequence of actual instructions. This pass
82/// must run after prologue/epilogue insertion and before lowering
83/// the MachineInstr to MC.
84FunctionPass *createX86ExpandPseudoPass();
Kevin B. Smith6a833502016-02-11 19:43:04 +000085
86/// Return a Machine IR pass that selectively replaces
87/// certain byte and word instructions by equivalent 32 bit instructions,
88/// in order to eliminate partial register usage, false dependences on
89/// the upper portions of registers, and to save code size.
90FunctionPass *createX86FixupBWInsts();
Ahmed Bougacha068ac4a2016-05-07 01:11:10 +000091
92void initializeFixupBWInstPassPass(PassRegistry &);
Gadi Haber19c4fc52016-12-28 10:12:48 +000093
94/// This pass replaces EVEX ecnoded of AVX-512 instructiosn by VEX
95/// encoding when possible in order to reduce code size.
96FunctionPass *createX86EvexToVexInsts();
97
Daniel Sanderse7b0d662017-04-21 15:59:56 +000098InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,
99 X86Subtarget &,
Daniel Sanders0b5293f2017-04-06 09:49:34 +0000100 X86RegisterBankInfo &);
101
Gadi Haber19c4fc52016-12-28 10:12:48 +0000102void initializeEvexToVexInstPassPass(PassRegistry &);
103
Alexander Kornienkof00654e2015-06-23 09:49:53 +0000104} // End llvm namespace
Chris Lattnerff9e21c2005-01-07 07:48:33 +0000105
Chris Lattnerd92fb002002-10-25 22:55:53 +0000106#endif