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gerrit-public.fairphone.software / toolchain / llvm-project / 11ea6fdcd7dc3df0401ad28a1d3396fd1713d829 / . / llvm / test / CodeGen / X86 / lea-opt-cse3.ll
blob: 4e030fb03a77ad96635092cc62eaf9f48fa2befb [file] [log] [blame]
Simon Pilgrim804cbd62017-07-27 10:36:09 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64
3; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
4
5define i32 @foo(i32 %a, i32 %b) local_unnamed_addr #0 {
6; X64-LABEL: foo:
7; X64: # BB#0: # %entry
8; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
9; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
10; X64-NEXT: leal 4(%rdi,%rsi,2), %ecx
11; X64-NEXT: leal 4(%rdi,%rsi,4), %eax
12; X64-NEXT: imull %ecx, %eax
13; X64-NEXT: retq
14;
15; X86-LABEL: foo:
16; X86: # BB#0: # %entry
17; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
18; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
19; X86-NEXT: leal 4(%ecx,%eax,2), %edx
20; X86-NEXT: leal 4(%ecx,%eax,4), %eax
21; X86-NEXT: imull %edx, %eax
22; X86-NEXT: retl
23entry:
24 %mul = shl i32 %b, 1
25 %add = add i32 %a, 4
26 %add1 = add i32 %add, %mul
27 %mul2 = shl i32 %b, 2
28 %add4 = add i32 %add, %mul2
29 %mul5 = mul nsw i32 %add1, %add4
30 ret i32 %mul5
31}
32
Simon Pilgrim11ea6fd2017-07-31 14:23:28 +0000[diff] [blame^]33define i32 @foo1(i32 %a, i32 %b) local_unnamed_addr #0 {
34; X64-LABEL: foo1:
35; X64: # BB#0: # %entry
36; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
37; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
38; X64-NEXT: leal 4(%rdi,%rsi,4), %ecx
39; X64-NEXT: leal 4(%rdi,%rsi,8), %eax
40; X64-NEXT: imull %ecx, %eax
41; X64-NEXT: retq
42;
43; X86-LABEL: foo1:
44; X86: # BB#0: # %entry
45; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
46; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
47; X86-NEXT: leal 4(%ecx,%eax,4), %edx
48; X86-NEXT: leal 4(%ecx,%eax,8), %eax
49; X86-NEXT: imull %edx, %eax
50; X86-NEXT: retl
51entry:
52 %mul = shl i32 %b, 2
53 %add = add i32 %a, 4
54 %add1 = add i32 %add, %mul
55 %mul2 = shl i32 %b, 3
56 %add4 = add i32 %add, %mul2
57 %mul5 = mul nsw i32 %add1, %add4
58 ret i32 %mul5
59}
60
61define i32 @foo1_mult_basic_blocks(i32 %a, i32 %b) local_unnamed_addr #0 {
62; X64-LABEL: foo1_mult_basic_blocks:
63; X64: # BB#0: # %entry
64; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
65; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
66; X64-NEXT: leal 4(%rdi,%rsi,4), %ecx
67; X64-NEXT: xorl %eax, %eax
68; X64-NEXT: cmpl $10, %ecx
69; X64-NEXT: je .LBB2_2
70; X64-NEXT: # BB#1: # %mid
71; X64-NEXT: leal 4(%rdi,%rsi,8), %eax
72; X64-NEXT: imull %eax, %ecx
73; X64-NEXT: movl %ecx, %eax
74; X64-NEXT: .LBB2_2: # %exit
75; X64-NEXT: retq
76;
77; X86-LABEL: foo1_mult_basic_blocks:
78; X86: # BB#0: # %entry
79; X86-NEXT: pushl %esi
80; X86-NEXT: .Lcfi0:
81; X86-NEXT: .cfi_def_cfa_offset 8
82; X86-NEXT: .Lcfi1:
83; X86-NEXT: .cfi_offset %esi, -8
84; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
85; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
86; X86-NEXT: leal 4(%esi,%edx,4), %ecx
87; X86-NEXT: xorl %eax, %eax
88; X86-NEXT: cmpl $10, %ecx
89; X86-NEXT: je .LBB2_2
90; X86-NEXT: # BB#1: # %mid
91; X86-NEXT: leal 4(%esi,%edx,8), %eax
92; X86-NEXT: imull %eax, %ecx
93; X86-NEXT: movl %ecx, %eax
94; X86-NEXT: .LBB2_2: # %exit
95; X86-NEXT: popl %esi
96; X86-NEXT: retl
97entry:
98 %mul = shl i32 %b, 2
99 %add = add i32 %a, 4
100 %add1 = add i32 %add, %mul
101 %cmp = icmp ne i32 %add1 , 10
102 br i1 %cmp , label %mid , label %exit
103mid:
104 %addn = add i32 %a , 4
105 %mul2 = shl i32 %b, 3
106 %add4 = add i32 %addn, %mul2
107 %mul5 = mul nsw i32 %add1, %add4
108 br label %exit
109
110exit:
111 %retmul = phi i32 [%mul5 , %mid] , [0 , %entry]
112 ret i32 %retmul
113}
114
115define i32 @foo1_mult_basic_blocks_illegal_scale(i32 %a, i32 %b) local_unnamed_addr #0 {
116; X64-LABEL: foo1_mult_basic_blocks_illegal_scale:
117; X64: # BB#0: # %entry
118; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
119; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
120; X64-NEXT: leal 4(%rdi,%rsi,2), %ecx
121; X64-NEXT: xorl %eax, %eax
122; X64-NEXT: cmpl $10, %ecx
123; X64-NEXT: je .LBB3_2
124; X64-NEXT: # BB#1: # %mid
125; X64-NEXT: leal 4(%rdi,%rsi,8), %eax
126; X64-NEXT: imull %eax, %ecx
127; X64-NEXT: movl %ecx, %eax
128; X64-NEXT: .LBB3_2: # %exit
129; X64-NEXT: retq
130;
131; X86-LABEL: foo1_mult_basic_blocks_illegal_scale:
132; X86: # BB#0: # %entry
133; X86-NEXT: pushl %esi
134; X86-NEXT: .Lcfi2:
135; X86-NEXT: .cfi_def_cfa_offset 8
136; X86-NEXT: .Lcfi3:
137; X86-NEXT: .cfi_offset %esi, -8
138; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
139; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
140; X86-NEXT: leal 4(%esi,%edx,2), %ecx
141; X86-NEXT: xorl %eax, %eax
142; X86-NEXT: cmpl $10, %ecx
143; X86-NEXT: je .LBB3_2
144; X86-NEXT: # BB#1: # %mid
145; X86-NEXT: leal 4(%esi,%edx,8), %eax
146; X86-NEXT: imull %eax, %ecx
147; X86-NEXT: movl %ecx, %eax
148; X86-NEXT: .LBB3_2: # %exit
149; X86-NEXT: popl %esi
150; X86-NEXT: retl
151entry:
152 %mul = shl i32 %b, 1
153 %add = add i32 %a, 4
154 %add1 = add i32 %add, %mul
155 %cmp = icmp ne i32 %add1 , 10
156 br i1 %cmp, label %mid , label %exit
157mid:
158 %addn = add i32 %a , 4
159 %mul2 = shl i32 %b, 3
160 %add4 = add i32 %addn, %mul2
161 %mul5 = mul nsw i32 %add1, %add4
162 br label %exit
163exit:
164 %retmul = phi i32 [%mul5 , %mid] , [0 , %entry]
165 ret i32 %retmul
166}