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Daniel Dunbar8f4a8a62012-05-08 16:50:35 +00001lli - directly execute programs from LLVM bitcode
2=================================================
3
James Hendersona0566842019-06-27 13:24:46 +00004.. program:: lli
5
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +00006SYNOPSIS
7--------
8
Renato Goline51c1ce2015-07-28 10:24:11 +00009:program:`lli` [*options*] [*filename*] [*program args*]
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000010
11DESCRIPTION
12-----------
13
Renato Goline51c1ce2015-07-28 10:24:11 +000014:program:`lli` directly executes programs in LLVM bitcode format. It takes a program
15in LLVM bitcode format and executes it using a just-in-time compiler or an
16interpreter.
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000017
Renato Goline51c1ce2015-07-28 10:24:11 +000018:program:`lli` is *not* an emulator. It will not execute IR of different architectures
19and it can only interpret (or JIT-compile) for the host architecture.
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000020
Renato Goline51c1ce2015-07-28 10:24:11 +000021The JIT compiler takes the same arguments as other tools, like :program:`llc`,
22but they don't necessarily work for the interpreter.
23
24If `filename` is not specified, then :program:`lli` reads the LLVM bitcode for the
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000025program from standard input.
26
27The optional *args* specified on the command line are passed to the program as
28arguments.
29
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000030GENERAL OPTIONS
31---------------
32
Renato Goline51c1ce2015-07-28 10:24:11 +000033.. option:: -fake-argv0=executable
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000034
35 Override the ``argv[0]`` value passed into the executing program.
36
Renato Goline51c1ce2015-07-28 10:24:11 +000037.. option:: -force-interpreter={false,true}
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000038
39 If set to true, use the interpreter even if a just-in-time compiler is available
40 for this architecture. Defaults to false.
41
Renato Goline51c1ce2015-07-28 10:24:11 +000042.. option:: -help
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000043
44 Print a summary of command line options.
45
Renato Goline51c1ce2015-07-28 10:24:11 +000046.. option:: -load=pluginfilename
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000047
Renato Goline51c1ce2015-07-28 10:24:11 +000048 Causes :program:`lli` to load the plugin (shared object) named *pluginfilename* and use
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000049 it for optimization.
50
Renato Goline51c1ce2015-07-28 10:24:11 +000051.. option:: -stats
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000052
53 Print statistics from the code-generation passes. This is only meaningful for
54 the just-in-time compiler, at present.
55
Renato Goline51c1ce2015-07-28 10:24:11 +000056.. option:: -time-passes
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000057
58 Record the amount of time needed for each code-generation pass and print it to
59 standard error.
60
Renato Goline51c1ce2015-07-28 10:24:11 +000061.. option:: -version
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000062
Renato Goline51c1ce2015-07-28 10:24:11 +000063 Print out the version of :program:`lli` and exit without doing anything else.
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000064
65TARGET OPTIONS
66--------------
67
Renato Goline51c1ce2015-07-28 10:24:11 +000068.. option:: -mtriple=target triple
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000069
70 Override the target triple specified in the input bitcode file with the
71 specified string. This may result in a crash if you pick an
72 architecture which is not compatible with the current system.
73
Renato Goline51c1ce2015-07-28 10:24:11 +000074.. option:: -march=arch
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000075
76 Specify the architecture for which to generate assembly, overriding the target
77 encoded in the bitcode file. See the output of **llc -help** for a list of
78 valid architectures. By default this is inferred from the target triple or
79 autodetected to the current architecture.
80
Renato Goline51c1ce2015-07-28 10:24:11 +000081.. option:: -mcpu=cpuname
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000082
83 Specify a specific chip in the current architecture to generate code for.
84 By default this is inferred from the target triple and autodetected to
85 the current architecture. For a list of available CPUs, use:
86 **llvm-as < /dev/null | llc -march=xyz -mcpu=help**
87
Renato Goline51c1ce2015-07-28 10:24:11 +000088.. option:: -mattr=a1,+a2,-a3,...
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000089
90 Override or control specific attributes of the target, such as whether SIMD
91 operations are enabled or not. The default set of attributes is set by the
92 current CPU. For a list of available attributes, use:
93 **llvm-as < /dev/null | llc -march=xyz -mattr=help**
94
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000095FLOATING POINT OPTIONS
96----------------------
97
Renato Goline51c1ce2015-07-28 10:24:11 +000098.. option:: -disable-excess-fp-precision
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +000099
100 Disable optimizations that may increase floating point precision.
101
Renato Goline51c1ce2015-07-28 10:24:11 +0000102.. option:: -enable-no-infs-fp-math
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000103
104 Enable optimizations that assume no Inf values.
105
Renato Goline51c1ce2015-07-28 10:24:11 +0000106.. option:: -enable-no-nans-fp-math
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000107
108 Enable optimizations that assume no NAN values.
109
Renato Goline51c1ce2015-07-28 10:24:11 +0000110.. option:: -enable-unsafe-fp-math
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000111
Renato Goline51c1ce2015-07-28 10:24:11 +0000112 Causes :program:`lli` to enable optimizations that may decrease floating point
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000113 precision.
114
Renato Goline51c1ce2015-07-28 10:24:11 +0000115.. option:: -soft-float
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000116
Renato Goline51c1ce2015-07-28 10:24:11 +0000117 Causes :program:`lli` to generate software floating point library calls instead of
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000118 equivalent hardware instructions.
119
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000120CODE GENERATION OPTIONS
121-----------------------
122
Renato Goline51c1ce2015-07-28 10:24:11 +0000123.. option:: -code-model=model
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000124
125 Choose the code model from:
126
Jonas Devlieghereaaecdc42017-11-06 11:47:24 +0000127 .. code-block:: text
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000128
129 default: Target default code model
David Green9dd1d452018-08-22 11:31:39 +0000130 tiny: Tiny code model
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000131 small: Small code model
132 kernel: Kernel code model
133 medium: Medium code model
134 large: Large code model
135
Renato Goline51c1ce2015-07-28 10:24:11 +0000136.. option:: -disable-post-RA-scheduler
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000137
138 Disable scheduling after register allocation.
139
Renato Goline51c1ce2015-07-28 10:24:11 +0000140.. option:: -disable-spill-fusing
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000141
142 Disable fusing of spill code into instructions.
143
Renato Goline51c1ce2015-07-28 10:24:11 +0000144.. option:: -jit-enable-eh
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000145
146 Exception handling should be enabled in the just-in-time compiler.
147
Renato Goline51c1ce2015-07-28 10:24:11 +0000148.. option:: -join-liveintervals
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000149
150 Coalesce copies (default=true).
151
Renato Goline51c1ce2015-07-28 10:24:11 +0000152.. option:: -nozero-initialized-in-bss
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000153
Renato Goline51c1ce2015-07-28 10:24:11 +0000154 Don't place zero-initialized symbols into the BSS section.
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000155
Renato Goline51c1ce2015-07-28 10:24:11 +0000156.. option:: -pre-RA-sched=scheduler
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000157
158 Instruction schedulers available (before register allocation):
159
Jonas Devlieghereaaecdc42017-11-06 11:47:24 +0000160 .. code-block:: text
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000161
162 =default: Best scheduler for the target
163 =none: No scheduling: breadth first sequencing
164 =simple: Simple two pass scheduling: minimize critical path and maximize processor utilization
165 =simple-noitin: Simple two pass scheduling: Same as simple except using generic latency
166 =list-burr: Bottom-up register reduction list scheduling
167 =list-tdrr: Top-down register reduction list scheduling
168 =list-td: Top-down list scheduler -print-machineinstrs - Print generated machine code
169
Renato Goline51c1ce2015-07-28 10:24:11 +0000170.. option:: -regalloc=allocator
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000171
172 Register allocator to use (default=linearscan)
173
Jonas Devlieghereaaecdc42017-11-06 11:47:24 +0000174 .. code-block:: text
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000175
176 =bigblock: Big-block register allocator
177 =linearscan: linear scan register allocator =local - local register allocator
178 =simple: simple register allocator
179
Renato Goline51c1ce2015-07-28 10:24:11 +0000180.. option:: -relocation-model=model
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000181
182 Choose relocation model from:
183
Jonas Devlieghereaaecdc42017-11-06 11:47:24 +0000184 .. code-block:: text
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000185
186 =default: Target default relocation model
187 =static: Non-relocatable code =pic - Fully relocatable, position independent code
188 =dynamic-no-pic: Relocatable external references, non-relocatable code
189
Renato Goline51c1ce2015-07-28 10:24:11 +0000190.. option:: -spiller
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000191
192 Spiller to use (default=local)
193
Jonas Devlieghereaaecdc42017-11-06 11:47:24 +0000194 .. code-block:: text
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000195
196 =simple: simple spiller
197 =local: local spiller
198
Renato Goline51c1ce2015-07-28 10:24:11 +0000199.. option:: -x86-asm-syntax=syntax
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000200
201 Choose style of code to emit from X86 backend:
202
Jonas Devlieghereaaecdc42017-11-06 11:47:24 +0000203 .. code-block:: text
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000204
205 =att: Emit AT&T-style assembly
206 =intel: Emit Intel-style assembly
207
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000208EXIT STATUS
209-----------
210
Renato Goline51c1ce2015-07-28 10:24:11 +0000211If :program:`lli` fails to load the program, it will exit with an exit code of 1.
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000212Otherwise, it will return the exit code of the program it executes.
213
Daniel Dunbar8f4a8a62012-05-08 16:50:35 +0000214SEE ALSO
215--------
216
Alex Brachet09a066b2019-07-04 21:19:05 +0000217:manpage:`llc(1)`