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Alex Lorenz8e0a1b42015-06-22 17:02:30 +00001//===- MIParser.h - Machine Instructions Parser ---------------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the function that parses the machine instructions.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H
15#define LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H
16
Alex Lorenz33f0aef2015-06-26 16:46:11 +000017#include "llvm/ADT/DenseMap.h"
Quentin Colombet2c646962016-06-08 23:27:46 +000018#include "llvm/ADT/SmallSet.h"
Alex Lorenz8e0a1b42015-06-22 17:02:30 +000019
20namespace llvm {
21
Mehdi Aminib550cb12016-04-18 09:17:29 +000022class StringRef;
Alex Lorenz8a1915b2015-07-27 22:42:41 +000023class BasicBlock;
Alex Lorenz33f0aef2015-06-26 16:46:11 +000024class MachineBasicBlock;
Alex Lorenz8e0a1b42015-06-22 17:02:30 +000025class MachineFunction;
Matthias Braun83947862016-07-13 22:23:23 +000026class MachineInstr;
27class MachineRegisterInfo;
Alex Lorenzdf9e3c62015-08-19 00:13:25 +000028class MDNode;
Matthias Braun74ad41c2016-10-11 03:13:01 +000029class RegisterBank;
Alex Lorenz5d6108e2015-06-26 22:56:48 +000030struct SlotMapping;
Alex Lorenz8e0a1b42015-06-22 17:02:30 +000031class SMDiagnostic;
32class SourceMgr;
Matthias Braun74ad41c2016-10-11 03:13:01 +000033class TargetRegisterClass;
34
35struct VRegInfo {
36 enum uint8_t {
37 UNKNOWN, NORMAL, GENERIC, REGBANK
38 } Kind = UNKNOWN;
39 bool Explicit = false; ///< VReg was explicitly specified in the .mir file.
40 union {
41 const TargetRegisterClass *RC;
42 const RegisterBank *RegBank;
43 } D;
44 unsigned VReg;
45 unsigned PreferredReg = 0;
46};
Alex Lorenz8e0a1b42015-06-22 17:02:30 +000047
Matthias Braunde5fea22017-01-18 00:59:19 +000048typedef StringMap<const TargetRegisterClass*> Name2RegClassMap;
49typedef StringMap<const RegisterBank*> Name2RegBankMap;
50
Alex Lorenz7a503fa2015-07-07 17:46:43 +000051struct PerFunctionMIParsingState {
Matthias Braun74ad41c2016-10-11 03:13:01 +000052 BumpPtrAllocator Allocator;
Matthias Braun83947862016-07-13 22:23:23 +000053 MachineFunction &MF;
Matthias Braune35861d2016-07-13 23:27:50 +000054 SourceMgr *SM;
55 const SlotMapping &IRSlots;
Matthias Braunde5fea22017-01-18 00:59:19 +000056 const Name2RegClassMap &Names2RegClasses;
57 const Name2RegBankMap &Names2RegBanks;
Matthias Braun83947862016-07-13 22:23:23 +000058
Alex Lorenz7a503fa2015-07-07 17:46:43 +000059 DenseMap<unsigned, MachineBasicBlock *> MBBSlots;
Matthias Braun74ad41c2016-10-11 03:13:01 +000060 DenseMap<unsigned, VRegInfo*> VRegInfos;
Alex Lorenz7feaf7c2015-07-16 23:37:45 +000061 DenseMap<unsigned, int> FixedStackObjectSlots;
62 DenseMap<unsigned, int> StackObjectSlots;
Alex Lorenzab980492015-07-20 20:51:18 +000063 DenseMap<unsigned, unsigned> ConstantPoolSlots;
Alex Lorenz31d70682015-07-15 23:38:35 +000064 DenseMap<unsigned, unsigned> JumpTableSlots;
Matthias Braun83947862016-07-13 22:23:23 +000065
Matthias Braune35861d2016-07-13 23:27:50 +000066 PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM,
Matthias Braunde5fea22017-01-18 00:59:19 +000067 const SlotMapping &IRSlots,
68 const Name2RegClassMap &Names2RegClasses,
69 const Name2RegBankMap &Names2RegBanks);
Matthias Braun74ad41c2016-10-11 03:13:01 +000070
71 VRegInfo &getVRegInfo(unsigned VReg);
Alex Lorenz7a503fa2015-07-07 17:46:43 +000072};
73
Alex Lorenz5022f6b2015-08-13 23:10:16 +000074/// Parse the machine basic block definitions, and skip the machine
75/// instructions.
76///
77/// This function runs the first parsing pass on the machine function's body.
78/// It parses only the machine basic block definitions and creates the machine
79/// basic blocks in the given machine function.
80///
81/// The machine instructions aren't parsed during the first pass because all
82/// the machine basic blocks aren't defined yet - this makes it impossible to
83/// resolve the machine basic block references.
84///
85/// Return true if an error occurred.
Matthias Braun83947862016-07-13 22:23:23 +000086bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS,
Matthias Braune35861d2016-07-13 23:27:50 +000087 StringRef Src, SMDiagnostic &Error);
Alex Lorenz5022f6b2015-08-13 23:10:16 +000088
89/// Parse the machine instructions.
90///
91/// This function runs the second parsing pass on the machine function's body.
92/// It skips the machine basic block definitions and parses only the machine
93/// instructions and basic block attributes like liveins and successors.
94///
95/// The second parsing pass assumes that the first parsing pass already ran
96/// on the given source string.
97///
98/// Return true if an error occurred.
Matthias Braun74ad41c2016-10-11 03:13:01 +000099bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src,
100 SMDiagnostic &Error);
Alex Lorenz8e0a1b42015-06-22 17:02:30 +0000101
Matthias Braun74ad41c2016-10-11 03:13:01 +0000102bool parseMBBReference(PerFunctionMIParsingState &PFS,
Matthias Braune35861d2016-07-13 23:27:50 +0000103 MachineBasicBlock *&MBB, StringRef Src,
Matthias Braun83947862016-07-13 22:23:23 +0000104 SMDiagnostic &Error);
Alex Lorenzf09df002015-06-30 18:16:42 +0000105
Tom Stellard9c884e42016-11-15 00:03:14 +0000106bool parseRegisterReference(PerFunctionMIParsingState &PFS,
107 unsigned &Reg, StringRef Src,
108 SMDiagnostic &Error);
109
Matthias Braun74ad41c2016-10-11 03:13:01 +0000110bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, unsigned &Reg,
111 StringRef Src, SMDiagnostic &Error);
Alex Lorenz9fab3702015-07-14 21:24:41 +0000112
Matthias Braun74ad41c2016-10-11 03:13:01 +0000113bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS,
114 VRegInfo *&Info, StringRef Src,
Alex Lorenz12045a42015-07-27 17:42:45 +0000115 SMDiagnostic &Error);
116
Matthias Braun74ad41c2016-10-11 03:13:01 +0000117bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI,
118 StringRef Src, SMDiagnostic &Error);
Alex Lorenza314d812015-08-18 22:26:26 +0000119
Matthias Braun74ad41c2016-10-11 03:13:01 +0000120bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src,
121 SMDiagnostic &Error);
Alex Lorenzdf9e3c62015-08-19 00:13:25 +0000122
Alex Lorenz8e0a1b42015-06-22 17:02:30 +0000123} // end namespace llvm
124
125#endif