Mehdi Amini | 945a660 | 2015-02-27 18:32:11 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM |
| 2 | ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM |
| 3 | ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB |
| 4 | ; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv8-apple-ios | FileCheck %s --check-prefix=THUMB |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 5 | |
| 6 | define i32 @t1(i1 %c) nounwind readnone { |
| 7 | entry: |
| 8 | ; ARM: t1 |
| 9 | ; ARM: movw r{{[1-9]}}, #10 |
Ahmed Bougacha | e8d0c4c | 2015-05-06 04:14:02 +0000 | [diff] [blame] | 10 | ; ARM: tst r0, #1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 11 | ; ARM: moveq r{{[1-9]}}, #20 |
| 12 | ; ARM: mov r0, r{{[1-9]}} |
| 13 | ; THUMB: t1 |
| 14 | ; THUMB: movs r{{[1-9]}}, #10 |
Ahmed Bougacha | e8d0c4c | 2015-05-06 04:14:02 +0000 | [diff] [blame] | 15 | ; THUMB: tst.w r0, #1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 16 | ; THUMB: it eq |
| 17 | ; THUMB: moveq r{{[1-9]}}, #20 |
| 18 | ; THUMB: mov r0, r{{[1-9]}} |
| 19 | %0 = select i1 %c, i32 10, i32 20 |
| 20 | ret i32 %0 |
| 21 | } |
| 22 | |
| 23 | define i32 @t2(i1 %c, i32 %a) nounwind readnone { |
| 24 | entry: |
| 25 | ; ARM: t2 |
Ahmed Bougacha | e8d0c4c | 2015-05-06 04:14:02 +0000 | [diff] [blame] | 26 | ; ARM: tst r0, #1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 27 | ; ARM: moveq r{{[1-9]}}, #20 |
| 28 | ; ARM: mov r0, r{{[1-9]}} |
| 29 | ; THUMB: t2 |
Ahmed Bougacha | e8d0c4c | 2015-05-06 04:14:02 +0000 | [diff] [blame] | 30 | ; THUMB: tst.w r0, #1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 31 | ; THUMB: it eq |
| 32 | ; THUMB: moveq r{{[1-9]}}, #20 |
| 33 | ; THUMB: mov r0, r{{[1-9]}} |
| 34 | %0 = select i1 %c, i32 %a, i32 20 |
| 35 | ret i32 %0 |
| 36 | } |
| 37 | |
| 38 | define i32 @t3(i1 %c, i32 %a, i32 %b) nounwind readnone { |
| 39 | entry: |
| 40 | ; ARM: t3 |
Ahmed Bougacha | e8d0c4c | 2015-05-06 04:14:02 +0000 | [diff] [blame] | 41 | ; ARM: tst r0, #1 |
Jim Grosbach | 71a78f9 | 2013-08-20 19:12:42 +0000 | [diff] [blame] | 42 | ; ARM: movne r2, r1 |
| 43 | ; ARM: add r0, r2, r1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 44 | ; THUMB: t3 |
Ahmed Bougacha | e8d0c4c | 2015-05-06 04:14:02 +0000 | [diff] [blame] | 45 | ; THUMB: tst.w r0, #1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 46 | ; THUMB: it ne |
Jim Grosbach | 71a78f9 | 2013-08-20 19:12:42 +0000 | [diff] [blame] | 47 | ; THUMB: movne r2, r1 |
| 48 | ; THUMB: add.w r0, r2, r1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 49 | %0 = select i1 %c, i32 %a, i32 %b |
Jim Grosbach | 71a78f9 | 2013-08-20 19:12:42 +0000 | [diff] [blame] | 50 | %1 = add i32 %0, %a |
| 51 | ret i32 %1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 52 | } |
| 53 | |
| 54 | define i32 @t4(i1 %c) nounwind readnone { |
| 55 | entry: |
| 56 | ; ARM: t4 |
| 57 | ; ARM: mvn r{{[1-9]}}, #9 |
Ahmed Bougacha | e8d0c4c | 2015-05-06 04:14:02 +0000 | [diff] [blame] | 58 | ; ARM: tst r0, #1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 59 | ; ARM: mvneq r{{[1-9]}}, #0 |
| 60 | ; ARM: mov r0, r{{[1-9]}} |
Juergen Ributzka | 4bf6c01 | 2014-08-19 19:05:24 +0000 | [diff] [blame] | 61 | ; THUMB-LABEL: t4 |
| 62 | ; THUMB: mvn [[REG:r[1-9]+]], #9 |
Ahmed Bougacha | e8d0c4c | 2015-05-06 04:14:02 +0000 | [diff] [blame] | 63 | ; THUMB: tst.w r0, #1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 64 | ; THUMB: it eq |
Juergen Ributzka | 4bf6c01 | 2014-08-19 19:05:24 +0000 | [diff] [blame] | 65 | ; THUMB: mvneq [[REG]], #0 |
| 66 | ; THUMB: mov r0, [[REG]] |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 67 | %0 = select i1 %c, i32 -10, i32 -1 |
| 68 | ret i32 %0 |
| 69 | } |
| 70 | |
| 71 | define i32 @t5(i1 %c, i32 %a) nounwind readnone { |
| 72 | entry: |
| 73 | ; ARM: t5 |
Ahmed Bougacha | e8d0c4c | 2015-05-06 04:14:02 +0000 | [diff] [blame] | 74 | ; ARM: tst r0, #1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 75 | ; ARM: mvneq r{{[1-9]}}, #1 |
| 76 | ; ARM: mov r0, r{{[1-9]}} |
| 77 | ; THUMB: t5 |
Ahmed Bougacha | e8d0c4c | 2015-05-06 04:14:02 +0000 | [diff] [blame] | 78 | ; THUMB: tst.w r0, #1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 79 | ; THUMB: it eq |
| 80 | ; THUMB: mvneq r{{[1-9]}}, #1 |
| 81 | ; THUMB: mov r0, r{{[1-9]}} |
| 82 | %0 = select i1 %c, i32 %a, i32 -2 |
| 83 | ret i32 %0 |
| 84 | } |
| 85 | |
| 86 | ; Check one large negative immediates. |
| 87 | define i32 @t6(i1 %c, i32 %a) nounwind readnone { |
| 88 | entry: |
| 89 | ; ARM: t6 |
Ahmed Bougacha | e8d0c4c | 2015-05-06 04:14:02 +0000 | [diff] [blame] | 90 | ; ARM: tst r0, #1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 91 | ; ARM: mvneq r{{[1-9]}}, #978944 |
| 92 | ; ARM: mov r0, r{{[1-9]}} |
| 93 | ; THUMB: t6 |
Ahmed Bougacha | e8d0c4c | 2015-05-06 04:14:02 +0000 | [diff] [blame] | 94 | ; THUMB: tst.w r0, #1 |
Chad Rosier | 7ddd63c | 2011-11-11 06:20:39 +0000 | [diff] [blame] | 95 | ; THUMB: it eq |
| 96 | ; THUMB: mvneq r{{[1-9]}}, #978944 |
| 97 | ; THUMB: mov r0, r{{[1-9]}} |
| 98 | %0 = select i1 %c, i32 %a, i32 -978945 |
| 99 | ret i32 %0 |
| 100 | } |