blob: 917a15d28bd79137e01ffa8be3968278538522b5 [file] [log] [blame]
Jim Grosbach3fa74912013-08-16 23:37:36 +00001; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
2; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
3; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
4; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG
5; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG
6; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=THUMB-LONG
7; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=ARM-NOVFP
8; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -mattr=-vfp2 | FileCheck %s --check-prefix=ARM-NOVFP
9; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=THUMB-NOVFP
Derek Schuffbd7c6e52013-05-14 16:26:38 +000010
NAKAMURA Takumi4d3457e2013-11-18 13:50:19 +000011; XFAIL: vg_leak
12
Derek Schuffbd7c6e52013-05-14 16:26:38 +000013; Note that some of these tests assume that relocations are either
14; movw/movt or constant pool loads. Different platforms will select
15; different approaches.
Chad Rosierd0191a52011-11-05 20:16:15 +000016
17define i32 @t0(i1 zeroext %a) nounwind {
18 %1 = zext i1 %a to i32
19 ret i32 %1
20}
21
22define i32 @t1(i8 signext %a) nounwind {
23 %1 = sext i8 %a to i32
24 ret i32 %1
25}
26
27define i32 @t2(i8 zeroext %a) nounwind {
28 %1 = zext i8 %a to i32
29 ret i32 %1
30}
31
32define i32 @t3(i16 signext %a) nounwind {
33 %1 = sext i16 %a to i32
34 ret i32 %1
35}
36
37define i32 @t4(i16 zeroext %a) nounwind {
38 %1 = zext i16 %a to i32
39 ret i32 %1
40}
41
42define void @foo(i8 %a, i16 %b) nounwind {
43; ARM: foo
44; THUMB: foo
45;; Materialize i1 1
46; ARM: movw r2, #1
47;; zero-ext
48; ARM: and r2, r2, #1
49; THUMB: and r2, r2, #1
50 %1 = call i32 @t0(i1 zeroext 1)
51; ARM: sxtb r2, r1
52; ARM: mov r0, r2
53; THUMB: sxtb r2, r1
54; THUMB: mov r0, r2
55 %2 = call i32 @t1(i8 signext %a)
JF Bastien06ce03d2013-06-07 20:10:37 +000056; ARM: and r2, r1, #255
Chad Rosierd0191a52011-11-05 20:16:15 +000057; ARM: mov r0, r2
JF Bastien06ce03d2013-06-07 20:10:37 +000058; THUMB: and r2, r1, #255
Chad Rosierd0191a52011-11-05 20:16:15 +000059; THUMB: mov r0, r2
60 %3 = call i32 @t2(i8 zeroext %a)
61; ARM: sxth r2, r1
62; ARM: mov r0, r2
63; THUMB: sxth r2, r1
64; THUMB: mov r0, r2
65 %4 = call i32 @t3(i16 signext %b)
66; ARM: uxth r2, r1
67; ARM: mov r0, r2
68; THUMB: uxth r2, r1
69; THUMB: mov r0, r2
70 %5 = call i32 @t4(i16 zeroext %b)
71
72;; A few test to check materialization
73;; Note: i1 1 was materialized with t1 call
74; ARM: movw r1, #255
75%6 = call i32 @t2(i8 zeroext 255)
76; ARM: movw r1, #65535
77; THUMB: movw r1, #65535
78%7 = call i32 @t4(i16 zeroext 65535)
79 ret void
80}
Chad Rosier5de1bea2011-11-08 00:03:32 +000081
82define void @foo2() nounwind {
83 %1 = call signext i16 @t5()
84 %2 = call zeroext i16 @t6()
85 %3 = call signext i8 @t7()
86 %4 = call zeroext i8 @t8()
87 %5 = call zeroext i1 @t9()
88 ret void
89}
90
91declare signext i16 @t5();
92declare zeroext i16 @t6();
93declare signext i8 @t7();
94declare zeroext i8 @t8();
95declare zeroext i1 @t9();
Chad Rosier9fd0e552011-12-02 20:25:18 +000096
David Blaikie97c6c5b2013-06-21 22:56:30 +000097define i32 @t10() {
Chad Rosier9fd0e552011-12-02 20:25:18 +000098entry:
99; ARM: @t10
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000100; ARM: movw [[R0:l?r[0-9]*]], #0
101; ARM: movw [[R1:l?r[0-9]*]], #248
102; ARM: movw [[R2:l?r[0-9]*]], #187
103; ARM: movw [[R3:l?r[0-9]*]], #28
104; ARM: movw [[R4:l?r[0-9]*]], #40
105; ARM: movw [[R5:l?r[0-9]*]], #186
JF Bastien06ce03d2013-06-07 20:10:37 +0000106; ARM: and [[R0]], [[R0]], #255
107; ARM: and [[R1]], [[R1]], #255
108; ARM: and [[R2]], [[R2]], #255
109; ARM: and [[R3]], [[R3]], #255
110; ARM: and [[R4]], [[R4]], #255
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000111; ARM: str [[R4]], [sp]
JF Bastien06ce03d2013-06-07 20:10:37 +0000112; ARM: and [[R4]], [[R5]], #255
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000113; ARM: str [[R4]], [sp, #4]
114; ARM: bl {{_?}}bar
Chad Rosierc6916f82012-06-12 19:25:13 +0000115; ARM-LONG: @t10
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000116; ARM-LONG: {{(movw)|(ldr)}} [[R:l?r[0-9]*]], {{(:lower16:L_bar\$non_lazy_ptr)|(.LCPI)}}
117; ARM-LONG: {{(movt [[R]], :upper16:L_bar\$non_lazy_ptr)?}}
118; ARM-LONG: ldr [[R]], {{\[}}[[R]]{{\]}}
119; ARM-LONG: blx [[R]]
Chad Rosier9fd0e552011-12-02 20:25:18 +0000120; THUMB: @t10
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000121; THUMB: movs [[R0:l?r[0-9]*]], #0
122; THUMB: movt [[R0]], #0
123; THUMB: movs [[R1:l?r[0-9]*]], #248
124; THUMB: movt [[R1]], #0
125; THUMB: movs [[R2:l?r[0-9]*]], #187
126; THUMB: movt [[R2]], #0
127; THUMB: movs [[R3:l?r[0-9]*]], #28
128; THUMB: movt [[R3]], #0
129; THUMB: movw [[R4:l?r[0-9]*]], #40
130; THUMB: movt [[R4]], #0
131; THUMB: movw [[R5:l?r[0-9]*]], #186
132; THUMB: movt [[R5]], #0
JF Bastien06ce03d2013-06-07 20:10:37 +0000133; THUMB: and [[R0]], [[R0]], #255
134; THUMB: and [[R1]], [[R1]], #255
135; THUMB: and [[R2]], [[R2]], #255
136; THUMB: and [[R3]], [[R3]], #255
137; THUMB: and [[R4]], [[R4]], #255
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000138; THUMB: str.w [[R4]], [sp]
JF Bastien06ce03d2013-06-07 20:10:37 +0000139; THUMB: and [[R4]], [[R5]], #255
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000140; THUMB: str.w [[R4]], [sp, #4]
141; THUMB: bl {{_?}}bar
Chad Rosierc6916f82012-06-12 19:25:13 +0000142; THUMB-LONG: @t10
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000143; THUMB-LONG: {{(movw)|(ldr.n)}} [[R:l?r[0-9]*]], {{(:lower16:L_bar\$non_lazy_ptr)|(.LCPI)}}
144; THUMB-LONG: {{(movt [[R]], :upper16:L_bar\$non_lazy_ptr)?}}
145; THUMB-LONG: ldr{{(.w)?}} [[R]], {{\[}}[[R]]{{\]}}
146; THUMB-LONG: blx [[R]]
Chad Rosier9fd0e552011-12-02 20:25:18 +0000147 %call = call i32 @bar(i8 zeroext 0, i8 zeroext -8, i8 zeroext -69, i8 zeroext 28, i8 zeroext 40, i8 zeroext -70)
148 ret i32 0
149}
150
151declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext)
Chad Rosier223faf72012-05-23 18:38:57 +0000152
153define i32 @bar0(i32 %i) nounwind {
154 ret i32 0
155}
156
157define void @foo3() uwtable {
158; ARM: movw r0, #0
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000159; ARM: {{(movw r1, :lower16:_?bar0)|(ldr r1, .LCPI)}}
160; ARM: {{(movt r1, :upper16:_?bar0)|(ldr r1, \[r1\])}}
Chad Rosier223faf72012-05-23 18:38:57 +0000161; ARM: blx r1
162; THUMB: movs r0, #0
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000163; THUMB: {{(movw r1, :lower16:_?bar0)|(ldr.n r1, .LCPI)}}
164; THUMB: {{(movt r1, :upper16:_?bar0)|(ldr r1, \[r1\])}}
Chad Rosier223faf72012-05-23 18:38:57 +0000165; THUMB: blx r1
166 %fptr = alloca i32 (i32)*, align 8
167 store i32 (i32)* @bar0, i32 (i32)** %fptr, align 8
168 %1 = load i32 (i32)** %fptr, align 8
169 %call = call i32 %1(i32 0)
170 ret void
171}
Chad Rosierc6916f82012-06-12 19:25:13 +0000172
173define i32 @LibCall(i32 %a, i32 %b) {
174entry:
175; ARM: LibCall
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000176; ARM: bl {{___udivsi3|__aeabi_uidiv}}
Chad Rosierc6916f82012-06-12 19:25:13 +0000177; ARM-LONG: LibCall
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000178; ARM-LONG: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr r2, .LCPI)}}
179; ARM-LONG: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}}
Chad Rosierc6916f82012-06-12 19:25:13 +0000180; ARM-LONG: ldr r2, [r2]
181; ARM-LONG: blx r2
182; THUMB: LibCall
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000183; THUMB: bl {{___udivsi3|__aeabi_uidiv}}
Chad Rosierc6916f82012-06-12 19:25:13 +0000184; THUMB-LONG: LibCall
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000185; THUMB-LONG: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr.n r2, .LCPI)}}
186; THUMB-LONG: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}}
Chad Rosierc6916f82012-06-12 19:25:13 +0000187; THUMB-LONG: ldr r2, [r2]
188; THUMB-LONG: blx r2
189 %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1]
190 ret i32 %tmp1
191}
Jush Lue67e07b2012-07-19 09:49:00 +0000192
Jush Lu26088cb2012-08-16 05:15:53 +0000193; Test fastcc
194
195define fastcc void @fast_callee(float %i) ssp {
196entry:
197; ARM: fast_callee
198; ARM: vmov r0, s0
199; THUMB: fast_callee
200; THUMB: vmov r0, s0
201; ARM-NOVFP: fast_callee
202; ARM-NOVFP-NOT: s0
203; THUMB-NOVFP: fast_callee
204; THUMB-NOVFP-NOT: s0
205 call void @print(float %i)
206 ret void
207}
208
209define void @fast_caller() ssp {
210entry:
211; ARM: fast_caller
212; ARM: vldr s0,
213; THUMB: fast_caller
214; THUMB: vldr s0,
215; ARM-NOVFP: fast_caller
216; ARM-NOVFP: movw r0, #13107
217; ARM-NOVFP: movt r0, #16611
218; THUMB-NOVFP: fast_caller
219; THUMB-NOVFP: movw r0, #13107
220; THUMB-NOVFP: movt r0, #16611
221 call fastcc void @fast_callee(float 0x401C666660000000)
222 ret void
223}
224
225define void @no_fast_callee(float %i) ssp {
226entry:
227; ARM: no_fast_callee
228; ARM: vmov s0, r0
229; THUMB: no_fast_callee
230; THUMB: vmov s0, r0
231; ARM-NOVFP: no_fast_callee
232; ARM-NOVFP-NOT: s0
233; THUMB-NOVFP: no_fast_callee
234; THUMB-NOVFP-NOT: s0
235 call void @print(float %i)
236 ret void
237}
238
239define void @no_fast_caller() ssp {
240entry:
241; ARM: no_fast_caller
242; ARM: vmov r0, s0
243; THUMB: no_fast_caller
244; THUMB: vmov r0, s0
245; ARM-NOVFP: no_fast_caller
246; ARM-NOVFP: movw r0, #13107
247; ARM-NOVFP: movt r0, #16611
248; THUMB-NOVFP: no_fast_caller
249; THUMB-NOVFP: movw r0, #13107
250; THUMB-NOVFP: movt r0, #16611
251 call void @no_fast_callee(float 0x401C666660000000)
252 ret void
253}
254
255declare void @print(float)