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gerrit-public.fairphone.software / toolchain / llvm-project / 1ca69fa64da40e7286f5f9d8e577017cd64b782c / . / llvm / lib / Target / PowerPC / PPCInstrVSX.td
blob: 3dfdf0806e31b14df1b24bc1a31bfdab2c9c0e6b [file] [log] [blame]
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]1//===- PPCInstrVSX.td - The PowerPC VSX Extension --*- tablegen -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file describes the VSX extension to the PowerPC instruction set.
11//
12//===----------------------------------------------------------------------===//
13
14def PPCRegVSRCAsmOperand : AsmOperandClass {
15 let Name = "RegVSRC"; let PredicateMethod = "isVSRegNumber";
16}
17def vsrc : RegisterOperand<VSRC> {
18 let ParserMatchClass = PPCRegVSRCAsmOperand;
19}
20
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]21def PPCRegVSFRCAsmOperand : AsmOperandClass {
22 let Name = "RegVSFRC"; let PredicateMethod = "isVSRegNumber";
23}
24def vsfrc : RegisterOperand<VSFRC> {
25 let ParserMatchClass = PPCRegVSFRCAsmOperand;
26}
27
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]28multiclass XX3Form_Rcr<bits<6> opcode, bits<7> xo, dag OOL, dag IOL,
29 string asmbase, string asmstr, InstrItinClass itin,
30 list<dag> pattern> {
31 let BaseName = asmbase in {
32 def NAME : XX3Form_Rc<opcode, xo, OOL, IOL,
33 !strconcat(asmbase, !strconcat(" ", asmstr)), itin,
34 pattern>;
35 let Defs = [CR6] in
36 def o : XX3Form_Rc<opcode, xo, OOL, IOL,
37 !strconcat(asmbase, !strconcat(". ", asmstr)), itin,
38 []>, isDOT;
39 }
40}
41
Eric Christopher1b8e7632014-05-22 01:07:24 +0000[diff] [blame]42def HasVSX : Predicate<"PPCSubTarget->hasVSX()">;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]43let Predicates = [HasVSX] in {
44let AddedComplexity = 400 in { // Prefer VSX patterns over non-VSX patterns.
45let neverHasSideEffects = 1 in { // VSX instructions don't have side effects.
46let Uses = [RM] in {
47
48 // Load indexed instructions
49 let mayLoad = 1, canFoldAsLoad = 1 in {
Bill Schmidtcb34fd02014-10-09 17:51:35 +0000[diff] [blame]50 def LXSDX : XX1Form<31, 588,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]51 (outs vsfrc:$XT), (ins memrr:$src),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]52 "lxsdx $XT, $src", IIC_LdStLFD,
53 [(set f64:$XT, (load xoaddr:$src))]>;
54
Bill Schmidtcb34fd02014-10-09 17:51:35 +0000[diff] [blame]55 def LXVD2X : XX1Form<31, 844,
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]56 (outs vsrc:$XT), (ins memrr:$src),
57 "lxvd2x $XT, $src", IIC_LdStLFD,
58 [(set v2f64:$XT, (load xoaddr:$src))]>;
59
Bill Schmidtcb34fd02014-10-09 17:51:35 +0000[diff] [blame]60 def LXVDSX : XX1Form<31, 332,
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]61 (outs vsrc:$XT), (ins memrr:$src),
62 "lxvdsx $XT, $src", IIC_LdStLFD, []>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]63
Bill Schmidtcb34fd02014-10-09 17:51:35 +0000[diff] [blame]64 def LXVW4X : XX1Form<31, 780,
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]65 (outs vsrc:$XT), (ins memrr:$src),
Bill Schmidt2d1128a2014-10-17 15:13:38 +0000[diff] [blame]66 "lxvw4x $XT, $src", IIC_LdStLFD,
67 [(set v4i32:$XT, (load xoaddr:$src))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]68 }
69
70 // Store indexed instructions
71 let mayStore = 1 in {
72 def STXSDX : XX1Form<31, 716,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]73 (outs), (ins vsfrc:$XT, memrr:$dst),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]74 "stxsdx $XT, $dst", IIC_LdStSTFD,
75 [(store f64:$XT, xoaddr:$dst)]>;
76
77 def STXVD2X : XX1Form<31, 972,
78 (outs), (ins vsrc:$XT, memrr:$dst),
79 "stxvd2x $XT, $dst", IIC_LdStSTFD,
80 [(store v2f64:$XT, xoaddr:$dst)]>;
81
82 def STXVW4X : XX1Form<31, 908,
83 (outs), (ins vsrc:$XT, memrr:$dst),
Bill Schmidt2d1128a2014-10-17 15:13:38 +0000[diff] [blame]84 "stxvw4x $XT, $dst", IIC_LdStSTFD,
85 [(store v4i32:$XT, xoaddr:$dst)]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]86 }
87
88 // Add/Mul Instructions
89 let isCommutable = 1 in {
90 def XSADDDP : XX3Form<60, 32,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]91 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]92 "xsadddp $XT, $XA, $XB", IIC_VecFP,
93 [(set f64:$XT, (fadd f64:$XA, f64:$XB))]>;
94 def XSMULDP : XX3Form<60, 48,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]95 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]96 "xsmuldp $XT, $XA, $XB", IIC_VecFP,
97 [(set f64:$XT, (fmul f64:$XA, f64:$XB))]>;
98
99 def XVADDDP : XX3Form<60, 96,
100 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
101 "xvadddp $XT, $XA, $XB", IIC_VecFP,
102 [(set v2f64:$XT, (fadd v2f64:$XA, v2f64:$XB))]>;
103
104 def XVADDSP : XX3Form<60, 64,
105 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
106 "xvaddsp $XT, $XA, $XB", IIC_VecFP,
107 [(set v4f32:$XT, (fadd v4f32:$XA, v4f32:$XB))]>;
108
109 def XVMULDP : XX3Form<60, 112,
110 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
111 "xvmuldp $XT, $XA, $XB", IIC_VecFP,
112 [(set v2f64:$XT, (fmul v2f64:$XA, v2f64:$XB))]>;
113
114 def XVMULSP : XX3Form<60, 80,
115 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
116 "xvmulsp $XT, $XA, $XB", IIC_VecFP,
117 [(set v4f32:$XT, (fmul v4f32:$XA, v4f32:$XB))]>;
118 }
119
120 // Subtract Instructions
121 def XSSUBDP : XX3Form<60, 40,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]122 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]123 "xssubdp $XT, $XA, $XB", IIC_VecFP,
124 [(set f64:$XT, (fsub f64:$XA, f64:$XB))]>;
125
126 def XVSUBDP : XX3Form<60, 104,
127 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
128 "xvsubdp $XT, $XA, $XB", IIC_VecFP,
129 [(set v2f64:$XT, (fsub v2f64:$XA, v2f64:$XB))]>;
130 def XVSUBSP : XX3Form<60, 72,
131 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
132 "xvsubsp $XT, $XA, $XB", IIC_VecFP,
133 [(set v4f32:$XT, (fsub v4f32:$XA, v4f32:$XB))]>;
134
135 // FMA Instructions
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]136 let BaseName = "XSMADDADP" in {
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]137 let isCommutable = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]138 def XSMADDADP : XX3Form<60, 33,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]139 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]140 "xsmaddadp $XT, $XA, $XB", IIC_VecFP,
141 [(set f64:$XT, (fma f64:$XA, f64:$XB, f64:$XTi))]>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]142 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
143 AltVSXFMARel;
144 let IsVSXFMAAlt = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]145 def XSMADDMDP : XX3Form<60, 41,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]146 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]147 "xsmaddmdp $XT, $XA, $XB", IIC_VecFP, []>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]148 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
149 AltVSXFMARel;
150 }
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]151
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]152 let BaseName = "XSMSUBADP" in {
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]153 let isCommutable = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]154 def XSMSUBADP : XX3Form<60, 49,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]155 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]156 "xsmsubadp $XT, $XA, $XB", IIC_VecFP,
157 [(set f64:$XT, (fma f64:$XA, f64:$XB, (fneg f64:$XTi)))]>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]158 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
159 AltVSXFMARel;
160 let IsVSXFMAAlt = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]161 def XSMSUBMDP : XX3Form<60, 57,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]162 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]163 "xsmsubmdp $XT, $XA, $XB", IIC_VecFP, []>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]164 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
165 AltVSXFMARel;
166 }
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]167
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]168 let BaseName = "XSNMADDADP" in {
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]169 let isCommutable = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]170 def XSNMADDADP : XX3Form<60, 161,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]171 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]172 "xsnmaddadp $XT, $XA, $XB", IIC_VecFP,
173 [(set f64:$XT, (fneg (fma f64:$XA, f64:$XB, f64:$XTi)))]>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]174 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
175 AltVSXFMARel;
176 let IsVSXFMAAlt = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]177 def XSNMADDMDP : XX3Form<60, 169,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]178 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]179 "xsnmaddmdp $XT, $XA, $XB", IIC_VecFP, []>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]180 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
181 AltVSXFMARel;
182 }
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]183
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]184 let BaseName = "XSNMSUBADP" in {
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]185 let isCommutable = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]186 def XSNMSUBADP : XX3Form<60, 177,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]187 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]188 "xsnmsubadp $XT, $XA, $XB", IIC_VecFP,
189 [(set f64:$XT, (fneg (fma f64:$XA, f64:$XB, (fneg f64:$XTi))))]>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]190 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
191 AltVSXFMARel;
192 let IsVSXFMAAlt = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]193 def XSNMSUBMDP : XX3Form<60, 185,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]194 (outs vsfrc:$XT), (ins vsfrc:$XTi, vsfrc:$XA, vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]195 "xsnmsubmdp $XT, $XA, $XB", IIC_VecFP, []>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]196 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
197 AltVSXFMARel;
198 }
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]199
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]200 let BaseName = "XVMADDADP" in {
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]201 let isCommutable = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]202 def XVMADDADP : XX3Form<60, 97,
203 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
204 "xvmaddadp $XT, $XA, $XB", IIC_VecFP,
205 [(set v2f64:$XT, (fma v2f64:$XA, v2f64:$XB, v2f64:$XTi))]>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]206 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
207 AltVSXFMARel;
208 let IsVSXFMAAlt = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]209 def XVMADDMDP : XX3Form<60, 105,
210 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
211 "xvmaddmdp $XT, $XA, $XB", IIC_VecFP, []>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]212 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
213 AltVSXFMARel;
214 }
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]215
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]216 let BaseName = "XVMADDASP" in {
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]217 let isCommutable = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]218 def XVMADDASP : XX3Form<60, 65,
219 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
220 "xvmaddasp $XT, $XA, $XB", IIC_VecFP,
221 [(set v4f32:$XT, (fma v4f32:$XA, v4f32:$XB, v4f32:$XTi))]>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]222 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
223 AltVSXFMARel;
224 let IsVSXFMAAlt = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]225 def XVMADDMSP : XX3Form<60, 73,
226 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
227 "xvmaddmsp $XT, $XA, $XB", IIC_VecFP, []>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]228 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
229 AltVSXFMARel;
230 }
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]231
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]232 let BaseName = "XVMSUBADP" in {
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]233 let isCommutable = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]234 def XVMSUBADP : XX3Form<60, 113,
235 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
236 "xvmsubadp $XT, $XA, $XB", IIC_VecFP,
237 [(set v2f64:$XT, (fma v2f64:$XA, v2f64:$XB, (fneg v2f64:$XTi)))]>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]238 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
239 AltVSXFMARel;
240 let IsVSXFMAAlt = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]241 def XVMSUBMDP : XX3Form<60, 121,
242 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
243 "xvmsubmdp $XT, $XA, $XB", IIC_VecFP, []>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]244 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
245 AltVSXFMARel;
246 }
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]247
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]248 let BaseName = "XVMSUBASP" in {
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]249 let isCommutable = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]250 def XVMSUBASP : XX3Form<60, 81,
251 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
252 "xvmsubasp $XT, $XA, $XB", IIC_VecFP,
253 [(set v4f32:$XT, (fma v4f32:$XA, v4f32:$XB, (fneg v4f32:$XTi)))]>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]254 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
255 AltVSXFMARel;
256 let IsVSXFMAAlt = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]257 def XVMSUBMSP : XX3Form<60, 89,
258 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
259 "xvmsubmsp $XT, $XA, $XB", IIC_VecFP, []>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]260 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
261 AltVSXFMARel;
262 }
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]263
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]264 let BaseName = "XVNMADDADP" in {
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]265 let isCommutable = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]266 def XVNMADDADP : XX3Form<60, 225,
267 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
268 "xvnmaddadp $XT, $XA, $XB", IIC_VecFP,
269 [(set v2f64:$XT, (fneg (fma v2f64:$XA, v2f64:$XB, v2f64:$XTi)))]>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]270 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
271 AltVSXFMARel;
272 let IsVSXFMAAlt = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]273 def XVNMADDMDP : XX3Form<60, 233,
274 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
275 "xvnmaddmdp $XT, $XA, $XB", IIC_VecFP, []>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]276 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
277 AltVSXFMARel;
278 }
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]279
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]280 let BaseName = "XVNMADDASP" in {
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]281 let isCommutable = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]282 def XVNMADDASP : XX3Form<60, 193,
283 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
284 "xvnmaddasp $XT, $XA, $XB", IIC_VecFP,
285 [(set v4f32:$XT, (fneg (fma v4f32:$XA, v4f32:$XB, v4f32:$XTi)))]>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]286 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
287 AltVSXFMARel;
288 let IsVSXFMAAlt = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]289 def XVNMADDMSP : XX3Form<60, 201,
290 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
291 "xvnmaddmsp $XT, $XA, $XB", IIC_VecFP, []>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]292 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
293 AltVSXFMARel;
294 }
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]295
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]296 let BaseName = "XVNMSUBADP" in {
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]297 let isCommutable = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]298 def XVNMSUBADP : XX3Form<60, 241,
299 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
300 "xvnmsubadp $XT, $XA, $XB", IIC_VecFP,
301 [(set v2f64:$XT, (fneg (fma v2f64:$XA, v2f64:$XB, (fneg v2f64:$XTi))))]>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]302 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
303 AltVSXFMARel;
304 let IsVSXFMAAlt = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]305 def XVNMSUBMDP : XX3Form<60, 249,
306 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
307 "xvnmsubmdp $XT, $XA, $XB", IIC_VecFP, []>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]308 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
309 AltVSXFMARel;
310 }
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]311
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]312 let BaseName = "XVNMSUBASP" in {
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]313 let isCommutable = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]314 def XVNMSUBASP : XX3Form<60, 209,
315 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
316 "xvnmsubasp $XT, $XA, $XB", IIC_VecFP,
317 [(set v4f32:$XT, (fneg (fma v4f32:$XA, v4f32:$XB, (fneg v4f32:$XTi))))]>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]318 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
319 AltVSXFMARel;
320 let IsVSXFMAAlt = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]321 def XVNMSUBMSP : XX3Form<60, 217,
322 (outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
323 "xvnmsubmsp $XT, $XA, $XB", IIC_VecFP, []>,
Hal Finkel25e04542014-03-25 18:55:11 +0000[diff] [blame]324 RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">,
325 AltVSXFMARel;
326 }
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]327
328 // Division Instructions
329 def XSDIVDP : XX3Form<60, 56,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]330 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]331 "xsdivdp $XT, $XA, $XB", IIC_FPDivD,
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]332 [(set f64:$XT, (fdiv f64:$XA, f64:$XB))]>;
333 def XSSQRTDP : XX2Form<60, 75,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]334 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]335 "xssqrtdp $XT, $XB", IIC_FPSqrtD,
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]336 [(set f64:$XT, (fsqrt f64:$XB))]>;
337
338 def XSREDP : XX2Form<60, 90,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]339 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]340 "xsredp $XT, $XB", IIC_VecFP,
341 [(set f64:$XT, (PPCfre f64:$XB))]>;
342 def XSRSQRTEDP : XX2Form<60, 74,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]343 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]344 "xsrsqrtedp $XT, $XB", IIC_VecFP,
345 [(set f64:$XT, (PPCfrsqrte f64:$XB))]>;
346
347 def XSTDIVDP : XX3Form_1<60, 61,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]348 (outs crrc:$crD), (ins vsfrc:$XA, vsfrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]349 "xstdivdp $crD, $XA, $XB", IIC_FPCompare, []>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]350 def XSTSQRTDP : XX2Form_1<60, 106,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]351 (outs crrc:$crD), (ins vsfrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]352 "xstsqrtdp $crD, $XB", IIC_FPCompare, []>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]353
354 def XVDIVDP : XX3Form<60, 120,
355 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]356 "xvdivdp $XT, $XA, $XB", IIC_FPDivD,
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]357 [(set v2f64:$XT, (fdiv v2f64:$XA, v2f64:$XB))]>;
358 def XVDIVSP : XX3Form<60, 88,
359 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]360 "xvdivsp $XT, $XA, $XB", IIC_FPDivS,
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]361 [(set v4f32:$XT, (fdiv v4f32:$XA, v4f32:$XB))]>;
362
363 def XVSQRTDP : XX2Form<60, 203,
364 (outs vsrc:$XT), (ins vsrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]365 "xvsqrtdp $XT, $XB", IIC_FPSqrtD,
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]366 [(set v2f64:$XT, (fsqrt v2f64:$XB))]>;
367 def XVSQRTSP : XX2Form<60, 139,
368 (outs vsrc:$XT), (ins vsrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]369 "xvsqrtsp $XT, $XB", IIC_FPSqrtS,
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]370 [(set v4f32:$XT, (fsqrt v4f32:$XB))]>;
371
372 def XVTDIVDP : XX3Form_1<60, 125,
373 (outs crrc:$crD), (ins vsrc:$XA, vsrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]374 "xvtdivdp $crD, $XA, $XB", IIC_FPCompare, []>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]375 def XVTDIVSP : XX3Form_1<60, 93,
376 (outs crrc:$crD), (ins vsrc:$XA, vsrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]377 "xvtdivsp $crD, $XA, $XB", IIC_FPCompare, []>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]378
379 def XVTSQRTDP : XX2Form_1<60, 234,
380 (outs crrc:$crD), (ins vsrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]381 "xvtsqrtdp $crD, $XB", IIC_FPCompare, []>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]382 def XVTSQRTSP : XX2Form_1<60, 170,
383 (outs crrc:$crD), (ins vsrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]384 "xvtsqrtsp $crD, $XB", IIC_FPCompare, []>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]385
386 def XVREDP : XX2Form<60, 218,
387 (outs vsrc:$XT), (ins vsrc:$XB),
388 "xvredp $XT, $XB", IIC_VecFP,
389 [(set v2f64:$XT, (PPCfre v2f64:$XB))]>;
390 def XVRESP : XX2Form<60, 154,
391 (outs vsrc:$XT), (ins vsrc:$XB),
392 "xvresp $XT, $XB", IIC_VecFP,
393 [(set v4f32:$XT, (PPCfre v4f32:$XB))]>;
394
395 def XVRSQRTEDP : XX2Form<60, 202,
396 (outs vsrc:$XT), (ins vsrc:$XB),
397 "xvrsqrtedp $XT, $XB", IIC_VecFP,
398 [(set v2f64:$XT, (PPCfrsqrte v2f64:$XB))]>;
399 def XVRSQRTESP : XX2Form<60, 138,
400 (outs vsrc:$XT), (ins vsrc:$XB),
401 "xvrsqrtesp $XT, $XB", IIC_VecFP,
402 [(set v4f32:$XT, (PPCfrsqrte v4f32:$XB))]>;
403
404 // Compare Instructions
405 def XSCMPODP : XX3Form_1<60, 43,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]406 (outs crrc:$crD), (ins vsfrc:$XA, vsfrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]407 "xscmpodp $crD, $XA, $XB", IIC_FPCompare, []>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]408 def XSCMPUDP : XX3Form_1<60, 35,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]409 (outs crrc:$crD), (ins vsfrc:$XA, vsfrc:$XB),
Hal Finkele8fba982014-03-29 13:20:31 +0000[diff] [blame]410 "xscmpudp $crD, $XA, $XB", IIC_FPCompare, []>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]411
412 defm XVCMPEQDP : XX3Form_Rcr<60, 99,
413 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
414 "xvcmpeqdp", "$XT, $XA, $XB", IIC_VecFPCompare, []>;
415 defm XVCMPEQSP : XX3Form_Rcr<60, 67,
416 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
417 "xvcmpeqsp", "$XT, $XA, $XB", IIC_VecFPCompare, []>;
418 defm XVCMPGEDP : XX3Form_Rcr<60, 115,
419 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
420 "xvcmpgedp", "$XT, $XA, $XB", IIC_VecFPCompare, []>;
421 defm XVCMPGESP : XX3Form_Rcr<60, 83,
422 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
423 "xvcmpgesp", "$XT, $XA, $XB", IIC_VecFPCompare, []>;
424 defm XVCMPGTDP : XX3Form_Rcr<60, 107,
425 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
426 "xvcmpgtdp", "$XT, $XA, $XB", IIC_VecFPCompare, []>;
427 defm XVCMPGTSP : XX3Form_Rcr<60, 75,
428 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
429 "xvcmpgtsp", "$XT, $XA, $XB", IIC_VecFPCompare, []>;
430
431 // Move Instructions
432 def XSABSDP : XX2Form<60, 345,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]433 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]434 "xsabsdp $XT, $XB", IIC_VecFP,
435 [(set f64:$XT, (fabs f64:$XB))]>;
436 def XSNABSDP : XX2Form<60, 361,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]437 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]438 "xsnabsdp $XT, $XB", IIC_VecFP,
439 [(set f64:$XT, (fneg (fabs f64:$XB)))]>;
440 def XSNEGDP : XX2Form<60, 377,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]441 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]442 "xsnegdp $XT, $XB", IIC_VecFP,
443 [(set f64:$XT, (fneg f64:$XB))]>;
444 def XSCPSGNDP : XX3Form<60, 176,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]445 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]446 "xscpsgndp $XT, $XA, $XB", IIC_VecFP,
447 [(set f64:$XT, (fcopysign f64:$XB, f64:$XA))]>;
448
449 def XVABSDP : XX2Form<60, 473,
450 (outs vsrc:$XT), (ins vsrc:$XB),
451 "xvabsdp $XT, $XB", IIC_VecFP,
452 [(set v2f64:$XT, (fabs v2f64:$XB))]>;
453
454 def XVABSSP : XX2Form<60, 409,
455 (outs vsrc:$XT), (ins vsrc:$XB),
456 "xvabssp $XT, $XB", IIC_VecFP,
457 [(set v4f32:$XT, (fabs v4f32:$XB))]>;
458
459 def XVCPSGNDP : XX3Form<60, 240,
460 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
461 "xvcpsgndp $XT, $XA, $XB", IIC_VecFP,
462 [(set v2f64:$XT, (fcopysign v2f64:$XB, v2f64:$XA))]>;
463 def XVCPSGNSP : XX3Form<60, 208,
464 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
465 "xvcpsgnsp $XT, $XA, $XB", IIC_VecFP,
466 [(set v4f32:$XT, (fcopysign v4f32:$XB, v4f32:$XA))]>;
467
468 def XVNABSDP : XX2Form<60, 489,
469 (outs vsrc:$XT), (ins vsrc:$XB),
470 "xvnabsdp $XT, $XB", IIC_VecFP,
471 [(set v2f64:$XT, (fneg (fabs v2f64:$XB)))]>;
472 def XVNABSSP : XX2Form<60, 425,
473 (outs vsrc:$XT), (ins vsrc:$XB),
474 "xvnabssp $XT, $XB", IIC_VecFP,
475 [(set v4f32:$XT, (fneg (fabs v4f32:$XB)))]>;
476
477 def XVNEGDP : XX2Form<60, 505,
478 (outs vsrc:$XT), (ins vsrc:$XB),
479 "xvnegdp $XT, $XB", IIC_VecFP,
480 [(set v2f64:$XT, (fneg v2f64:$XB))]>;
481 def XVNEGSP : XX2Form<60, 441,
482 (outs vsrc:$XT), (ins vsrc:$XB),
483 "xvnegsp $XT, $XB", IIC_VecFP,
484 [(set v4f32:$XT, (fneg v4f32:$XB))]>;
485
486 // Conversion Instructions
487 def XSCVDPSP : XX2Form<60, 265,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]488 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]489 "xscvdpsp $XT, $XB", IIC_VecFP, []>;
490 def XSCVDPSXDS : XX2Form<60, 344,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]491 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel4a912252014-03-23 05:35:00 +0000[diff] [blame]492 "xscvdpsxds $XT, $XB", IIC_VecFP,
493 [(set f64:$XT, (PPCfctidz f64:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]494 def XSCVDPSXWS : XX2Form<60, 88,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]495 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel4a912252014-03-23 05:35:00 +0000[diff] [blame]496 "xscvdpsxws $XT, $XB", IIC_VecFP,
497 [(set f64:$XT, (PPCfctiwz f64:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]498 def XSCVDPUXDS : XX2Form<60, 328,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]499 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel4a912252014-03-23 05:35:00 +0000[diff] [blame]500 "xscvdpuxds $XT, $XB", IIC_VecFP,
501 [(set f64:$XT, (PPCfctiduz f64:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]502 def XSCVDPUXWS : XX2Form<60, 72,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]503 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel4a912252014-03-23 05:35:00 +0000[diff] [blame]504 "xscvdpuxws $XT, $XB", IIC_VecFP,
505 [(set f64:$XT, (PPCfctiwuz f64:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]506 def XSCVSPDP : XX2Form<60, 329,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]507 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]508 "xscvspdp $XT, $XB", IIC_VecFP, []>;
509 def XSCVSXDDP : XX2Form<60, 376,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]510 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel4a912252014-03-23 05:35:00 +0000[diff] [blame]511 "xscvsxddp $XT, $XB", IIC_VecFP,
512 [(set f64:$XT, (PPCfcfid f64:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]513 def XSCVUXDDP : XX2Form<60, 360,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]514 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel4a912252014-03-23 05:35:00 +0000[diff] [blame]515 "xscvuxddp $XT, $XB", IIC_VecFP,
516 [(set f64:$XT, (PPCfcfidu f64:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]517
518 def XVCVDPSP : XX2Form<60, 393,
519 (outs vsrc:$XT), (ins vsrc:$XB),
520 "xvcvdpsp $XT, $XB", IIC_VecFP, []>;
521 def XVCVDPSXDS : XX2Form<60, 472,
522 (outs vsrc:$XT), (ins vsrc:$XB),
Hal Finkel7279f4b2014-03-26 19:13:54 +0000[diff] [blame]523 "xvcvdpsxds $XT, $XB", IIC_VecFP,
524 [(set v2i64:$XT, (fp_to_sint v2f64:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]525 def XVCVDPSXWS : XX2Form<60, 216,
526 (outs vsrc:$XT), (ins vsrc:$XB),
527 "xvcvdpsxws $XT, $XB", IIC_VecFP, []>;
528 def XVCVDPUXDS : XX2Form<60, 456,
529 (outs vsrc:$XT), (ins vsrc:$XB),
Hal Finkel7279f4b2014-03-26 19:13:54 +0000[diff] [blame]530 "xvcvdpuxds $XT, $XB", IIC_VecFP,
531 [(set v2i64:$XT, (fp_to_uint v2f64:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]532 def XVCVDPUXWS : XX2Form<60, 200,
533 (outs vsrc:$XT), (ins vsrc:$XB),
534 "xvcvdpuxws $XT, $XB", IIC_VecFP, []>;
535
536 def XVCVSPDP : XX2Form<60, 457,
537 (outs vsrc:$XT), (ins vsrc:$XB),
538 "xvcvspdp $XT, $XB", IIC_VecFP, []>;
539 def XVCVSPSXDS : XX2Form<60, 408,
540 (outs vsrc:$XT), (ins vsrc:$XB),
541 "xvcvspsxds $XT, $XB", IIC_VecFP, []>;
542 def XVCVSPSXWS : XX2Form<60, 152,
543 (outs vsrc:$XT), (ins vsrc:$XB),
544 "xvcvspsxws $XT, $XB", IIC_VecFP, []>;
545 def XVCVSPUXDS : XX2Form<60, 392,
546 (outs vsrc:$XT), (ins vsrc:$XB),
547 "xvcvspuxds $XT, $XB", IIC_VecFP, []>;
548 def XVCVSPUXWS : XX2Form<60, 136,
549 (outs vsrc:$XT), (ins vsrc:$XB),
550 "xvcvspuxws $XT, $XB", IIC_VecFP, []>;
551 def XVCVSXDDP : XX2Form<60, 504,
552 (outs vsrc:$XT), (ins vsrc:$XB),
Hal Finkel7279f4b2014-03-26 19:13:54 +0000[diff] [blame]553 "xvcvsxddp $XT, $XB", IIC_VecFP,
554 [(set v2f64:$XT, (sint_to_fp v2i64:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]555 def XVCVSXDSP : XX2Form<60, 440,
556 (outs vsrc:$XT), (ins vsrc:$XB),
557 "xvcvsxdsp $XT, $XB", IIC_VecFP, []>;
558 def XVCVSXWDP : XX2Form<60, 248,
559 (outs vsrc:$XT), (ins vsrc:$XB),
560 "xvcvsxwdp $XT, $XB", IIC_VecFP, []>;
561 def XVCVSXWSP : XX2Form<60, 184,
562 (outs vsrc:$XT), (ins vsrc:$XB),
563 "xvcvsxwsp $XT, $XB", IIC_VecFP, []>;
564 def XVCVUXDDP : XX2Form<60, 488,
565 (outs vsrc:$XT), (ins vsrc:$XB),
Hal Finkel7279f4b2014-03-26 19:13:54 +0000[diff] [blame]566 "xvcvuxddp $XT, $XB", IIC_VecFP,
567 [(set v2f64:$XT, (uint_to_fp v2i64:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]568 def XVCVUXDSP : XX2Form<60, 424,
569 (outs vsrc:$XT), (ins vsrc:$XB),
570 "xvcvuxdsp $XT, $XB", IIC_VecFP, []>;
571 def XVCVUXWDP : XX2Form<60, 232,
572 (outs vsrc:$XT), (ins vsrc:$XB),
573 "xvcvuxwdp $XT, $XB", IIC_VecFP, []>;
574 def XVCVUXWSP : XX2Form<60, 168,
575 (outs vsrc:$XT), (ins vsrc:$XB),
576 "xvcvuxwsp $XT, $XB", IIC_VecFP, []>;
577
578 // Rounding Instructions
579 def XSRDPI : XX2Form<60, 73,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]580 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]581 "xsrdpi $XT, $XB", IIC_VecFP,
582 [(set f64:$XT, (frnd f64:$XB))]>;
583 def XSRDPIC : XX2Form<60, 107,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]584 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]585 "xsrdpic $XT, $XB", IIC_VecFP,
586 [(set f64:$XT, (fnearbyint f64:$XB))]>;
587 def XSRDPIM : XX2Form<60, 121,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]588 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]589 "xsrdpim $XT, $XB", IIC_VecFP,
590 [(set f64:$XT, (ffloor f64:$XB))]>;
591 def XSRDPIP : XX2Form<60, 105,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]592 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]593 "xsrdpip $XT, $XB", IIC_VecFP,
594 [(set f64:$XT, (fceil f64:$XB))]>;
595 def XSRDPIZ : XX2Form<60, 89,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]596 (outs vsfrc:$XT), (ins vsfrc:$XB),
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]597 "xsrdpiz $XT, $XB", IIC_VecFP,
598 [(set f64:$XT, (ftrunc f64:$XB))]>;
599
600 def XVRDPI : XX2Form<60, 201,
601 (outs vsrc:$XT), (ins vsrc:$XB),
602 "xvrdpi $XT, $XB", IIC_VecFP,
603 [(set v2f64:$XT, (frnd v2f64:$XB))]>;
604 def XVRDPIC : XX2Form<60, 235,
605 (outs vsrc:$XT), (ins vsrc:$XB),
606 "xvrdpic $XT, $XB", IIC_VecFP,
607 [(set v2f64:$XT, (fnearbyint v2f64:$XB))]>;
608 def XVRDPIM : XX2Form<60, 249,
609 (outs vsrc:$XT), (ins vsrc:$XB),
610 "xvrdpim $XT, $XB", IIC_VecFP,
611 [(set v2f64:$XT, (ffloor v2f64:$XB))]>;
612 def XVRDPIP : XX2Form<60, 233,
613 (outs vsrc:$XT), (ins vsrc:$XB),
614 "xvrdpip $XT, $XB", IIC_VecFP,
615 [(set v2f64:$XT, (fceil v2f64:$XB))]>;
616 def XVRDPIZ : XX2Form<60, 217,
617 (outs vsrc:$XT), (ins vsrc:$XB),
618 "xvrdpiz $XT, $XB", IIC_VecFP,
619 [(set v2f64:$XT, (ftrunc v2f64:$XB))]>;
620
621 def XVRSPI : XX2Form<60, 137,
622 (outs vsrc:$XT), (ins vsrc:$XB),
623 "xvrspi $XT, $XB", IIC_VecFP,
624 [(set v4f32:$XT, (frnd v4f32:$XB))]>;
625 def XVRSPIC : XX2Form<60, 171,
626 (outs vsrc:$XT), (ins vsrc:$XB),
627 "xvrspic $XT, $XB", IIC_VecFP,
628 [(set v4f32:$XT, (fnearbyint v4f32:$XB))]>;
629 def XVRSPIM : XX2Form<60, 185,
630 (outs vsrc:$XT), (ins vsrc:$XB),
631 "xvrspim $XT, $XB", IIC_VecFP,
632 [(set v4f32:$XT, (ffloor v4f32:$XB))]>;
633 def XVRSPIP : XX2Form<60, 169,
634 (outs vsrc:$XT), (ins vsrc:$XB),
635 "xvrspip $XT, $XB", IIC_VecFP,
636 [(set v4f32:$XT, (fceil v4f32:$XB))]>;
637 def XVRSPIZ : XX2Form<60, 153,
638 (outs vsrc:$XT), (ins vsrc:$XB),
639 "xvrspiz $XT, $XB", IIC_VecFP,
640 [(set v4f32:$XT, (ftrunc v4f32:$XB))]>;
641
642 // Max/Min Instructions
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]643 let isCommutable = 1 in {
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]644 def XSMAXDP : XX3Form<60, 160,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]645 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
Bill Schmidt1ca69fa2014-10-31 19:19:07 +0000[diff] [blame^]646 "xsmaxdp $XT, $XA, $XB", IIC_VecFP,
647 [(set vsfrc:$XT,
648 (int_ppc_vsx_xsmaxdp vsfrc:$XA, vsfrc:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]649 def XSMINDP : XX3Form<60, 168,
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]650 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
Bill Schmidt1ca69fa2014-10-31 19:19:07 +0000[diff] [blame^]651 "xsmindp $XT, $XA, $XB", IIC_VecFP,
652 [(set vsfrc:$XT,
653 (int_ppc_vsx_xsmindp vsfrc:$XA, vsfrc:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]654
655 def XVMAXDP : XX3Form<60, 224,
656 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
Bill Schmidt1ca69fa2014-10-31 19:19:07 +0000[diff] [blame^]657 "xvmaxdp $XT, $XA, $XB", IIC_VecFP,
658 [(set vsrc:$XT,
659 (int_ppc_vsx_xvmaxdp vsrc:$XA, vsrc:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]660 def XVMINDP : XX3Form<60, 232,
661 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
Bill Schmidt1ca69fa2014-10-31 19:19:07 +0000[diff] [blame^]662 "xvmindp $XT, $XA, $XB", IIC_VecFP,
663 [(set vsrc:$XT,
664 (int_ppc_vsx_xvmindp vsrc:$XA, vsrc:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]665
666 def XVMAXSP : XX3Form<60, 192,
667 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
Bill Schmidt1ca69fa2014-10-31 19:19:07 +0000[diff] [blame^]668 "xvmaxsp $XT, $XA, $XB", IIC_VecFP,
669 [(set vsrc:$XT,
670 (int_ppc_vsx_xvmaxsp vsrc:$XA, vsrc:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]671 def XVMINSP : XX3Form<60, 200,
672 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
Bill Schmidt1ca69fa2014-10-31 19:19:07 +0000[diff] [blame^]673 "xvminsp $XT, $XA, $XB", IIC_VecFP,
674 [(set vsrc:$XT,
675 (int_ppc_vsx_xvminsp vsrc:$XA, vsrc:$XB))]>;
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]676 } // isCommutable
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]677} // Uses = [RM]
678
679 // Logical Instructions
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]680 let isCommutable = 1 in
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]681 def XXLAND : XX3Form<60, 130,
682 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
Hal Finkelbd4de9d2014-03-26 04:55:40 +0000[diff] [blame]683 "xxland $XT, $XA, $XB", IIC_VecGeneral,
684 [(set v4i32:$XT, (and v4i32:$XA, v4i32:$XB))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]685 def XXLANDC : XX3Form<60, 138,
686 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
Hal Finkelbd4de9d2014-03-26 04:55:40 +0000[diff] [blame]687 "xxlandc $XT, $XA, $XB", IIC_VecGeneral,
688 [(set v4i32:$XT, (and v4i32:$XA,
689 (vnot_ppc v4i32:$XB)))]>;
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]690 let isCommutable = 1 in {
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]691 def XXLNOR : XX3Form<60, 162,
692 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
Hal Finkelbd4de9d2014-03-26 04:55:40 +0000[diff] [blame]693 "xxlnor $XT, $XA, $XB", IIC_VecGeneral,
694 [(set v4i32:$XT, (vnot_ppc (or v4i32:$XA,
695 v4i32:$XB)))]>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]696 def XXLOR : XX3Form<60, 146,
697 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
Hal Finkelbd4de9d2014-03-26 04:55:40 +0000[diff] [blame]698 "xxlor $XT, $XA, $XB", IIC_VecGeneral,
699 [(set v4i32:$XT, (or v4i32:$XA, v4i32:$XB))]>;
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]700 let isCodeGenOnly = 1 in
701 def XXLORf: XX3Form<60, 146,
702 (outs vsfrc:$XT), (ins vsfrc:$XA, vsfrc:$XB),
703 "xxlor $XT, $XA, $XB", IIC_VecGeneral, []>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]704 def XXLXOR : XX3Form<60, 154,
705 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
Hal Finkelbd4de9d2014-03-26 04:55:40 +0000[diff] [blame]706 "xxlxor $XT, $XA, $XB", IIC_VecGeneral,
707 [(set v4i32:$XT, (xor v4i32:$XA, v4i32:$XB))]>;
Hal Finkele01d3212014-03-24 15:07:28 +0000[diff] [blame]708 } // isCommutable
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]709
710 // Permutation Instructions
711 def XXMRGHW : XX3Form<60, 18,
712 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
713 "xxmrghw $XT, $XA, $XB", IIC_VecPerm, []>;
714 def XXMRGLW : XX3Form<60, 50,
715 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
716 "xxmrglw $XT, $XA, $XB", IIC_VecPerm, []>;
717
718 def XXPERMDI : XX3Form_2<60, 10,
719 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, u2imm:$DM),
720 "xxpermdi $XT, $XA, $XB, $DM", IIC_VecPerm, []>;
721 def XXSEL : XX4Form<60, 3,
722 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, vsrc:$XC),
723 "xxsel $XT, $XA, $XB, $XC", IIC_VecPerm, []>;
724
725 def XXSLDWI : XX3Form_2<60, 2,
726 (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, u2imm:$SHW),
727 "xxsldwi $XT, $XA, $XB, $SHW", IIC_VecPerm, []>;
728 def XXSPLTW : XX2Form_2<60, 164,
729 (outs vsrc:$XT), (ins vsrc:$XB, u2imm:$UIM),
730 "xxspltw $XT, $XB, $UIM", IIC_VecPerm, []>;
731} // neverHasSideEffects
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]732
Bill Schmidt61e65232014-10-22 13:13:40 +0000[diff] [blame]733// SELECT_CC_* - Used to implement the SELECT_CC DAG operation. Expanded after
734// instruction selection into a branch sequence.
735let usesCustomInserter = 1, // Expanded after instruction selection.
736 PPC970_Single = 1 in {
737
738 def SELECT_CC_VSRC: Pseudo<(outs vsrc:$dst),
739 (ins crrc:$cond, vsrc:$T, vsrc:$F, i32imm:$BROPC),
740 "#SELECT_CC_VSRC",
741 []>;
Bill Schmidt9c54bbd2014-10-22 16:58:20 +0000[diff] [blame]742 def SELECT_VSRC: Pseudo<(outs vsrc:$dst),
743 (ins crbitrc:$cond, vsrc:$T, vsrc:$F),
744 "#SELECT_VSRC",
Bill Schmidt61e65232014-10-22 13:13:40 +0000[diff] [blame]745 [(set v2f64:$dst,
746 (select i1:$cond, v2f64:$T, v2f64:$F))]>;
Bill Schmidt9c54bbd2014-10-22 16:58:20 +0000[diff] [blame]747 def SELECT_CC_VSFRC: Pseudo<(outs f8rc:$dst),
748 (ins crrc:$cond, f8rc:$T, f8rc:$F,
749 i32imm:$BROPC), "#SELECT_CC_VSFRC",
750 []>;
751 def SELECT_VSFRC: Pseudo<(outs f8rc:$dst),
752 (ins crbitrc:$cond, f8rc:$T, f8rc:$F),
753 "#SELECT_VSFRC",
754 [(set f64:$dst,
755 (select i1:$cond, f64:$T, f64:$F))]>;
756} // usesCustomInserter
757} // AddedComplexity
Bill Schmidt61e65232014-10-22 13:13:40 +0000[diff] [blame]758
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]759def : InstAlias<"xvmovdp $XT, $XB",
760 (XVCPSGNDP vsrc:$XT, vsrc:$XB, vsrc:$XB)>;
761def : InstAlias<"xvmovsp $XT, $XB",
762 (XVCPSGNSP vsrc:$XT, vsrc:$XB, vsrc:$XB)>;
763
764def : InstAlias<"xxspltd $XT, $XB, 0",
765 (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 0)>;
766def : InstAlias<"xxspltd $XT, $XB, 1",
767 (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 3)>;
768def : InstAlias<"xxmrghd $XT, $XA, $XB",
769 (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 0)>;
770def : InstAlias<"xxmrgld $XT, $XA, $XB",
771 (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 3)>;
772def : InstAlias<"xxswapd $XT, $XB",
773 (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 2)>;
774
775let AddedComplexity = 400 in { // Prefer VSX patterns over non-VSX patterns.
776def : Pat<(v2f64 (scalar_to_vector f64:$A)),
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]777 (v2f64 (SUBREG_TO_REG (i64 1), $A, sub_64))>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]778
779def : Pat<(f64 (vector_extract v2f64:$S, 0)),
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]780 (f64 (EXTRACT_SUBREG $S, sub_64))>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]781def : Pat<(f64 (vector_extract v2f64:$S, 1)),
Hal Finkel19be5062014-03-29 05:29:01 +0000[diff] [blame]782 (f64 (EXTRACT_SUBREG (XXPERMDI $S, $S, 2), sub_64))>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]783
784// Additional fnmsub patterns: -a*c + b == -(a*c - b)
785def : Pat<(fma (fneg f64:$A), f64:$C, f64:$B),
786 (XSNMSUBADP $B, $C, $A)>;
787def : Pat<(fma f64:$A, (fneg f64:$C), f64:$B),
788 (XSNMSUBADP $B, $C, $A)>;
789
790def : Pat<(fma (fneg v2f64:$A), v2f64:$C, v2f64:$B),
791 (XVNMSUBADP $B, $C, $A)>;
792def : Pat<(fma v2f64:$A, (fneg v2f64:$C), v2f64:$B),
793 (XVNMSUBADP $B, $C, $A)>;
794
795def : Pat<(fma (fneg v4f32:$A), v4f32:$C, v4f32:$B),
796 (XVNMSUBASP $B, $C, $A)>;
797def : Pat<(fma v4f32:$A, (fneg v4f32:$C), v4f32:$B),
798 (XVNMSUBASP $B, $C, $A)>;
799
Hal Finkel9e0baa62014-04-01 19:24:27 +0000[diff] [blame]800def : Pat<(v2f64 (bitconvert v4f32:$A)),
801 (COPY_TO_REGCLASS $A, VSRC)>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]802def : Pat<(v2f64 (bitconvert v4i32:$A)),
803 (COPY_TO_REGCLASS $A, VSRC)>;
804def : Pat<(v2f64 (bitconvert v8i16:$A)),
805 (COPY_TO_REGCLASS $A, VSRC)>;
806def : Pat<(v2f64 (bitconvert v16i8:$A)),
807 (COPY_TO_REGCLASS $A, VSRC)>;
808
Hal Finkel9e0baa62014-04-01 19:24:27 +0000[diff] [blame]809def : Pat<(v4f32 (bitconvert v2f64:$A)),
810 (COPY_TO_REGCLASS $A, VRRC)>;
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]811def : Pat<(v4i32 (bitconvert v2f64:$A)),
812 (COPY_TO_REGCLASS $A, VRRC)>;
813def : Pat<(v8i16 (bitconvert v2f64:$A)),
814 (COPY_TO_REGCLASS $A, VRRC)>;
815def : Pat<(v16i8 (bitconvert v2f64:$A)),
816 (COPY_TO_REGCLASS $A, VRRC)>;
817
Hal Finkel9e0baa62014-04-01 19:24:27 +0000[diff] [blame]818def : Pat<(v2i64 (bitconvert v4f32:$A)),
819 (COPY_TO_REGCLASS $A, VSRC)>;
Hal Finkela6c8b512014-03-26 16:12:58 +0000[diff] [blame]820def : Pat<(v2i64 (bitconvert v4i32:$A)),
821 (COPY_TO_REGCLASS $A, VSRC)>;
822def : Pat<(v2i64 (bitconvert v8i16:$A)),
823 (COPY_TO_REGCLASS $A, VSRC)>;
824def : Pat<(v2i64 (bitconvert v16i8:$A)),
825 (COPY_TO_REGCLASS $A, VSRC)>;
826
Hal Finkel9e0baa62014-04-01 19:24:27 +0000[diff] [blame]827def : Pat<(v4f32 (bitconvert v2i64:$A)),
828 (COPY_TO_REGCLASS $A, VRRC)>;
Hal Finkela6c8b512014-03-26 16:12:58 +0000[diff] [blame]829def : Pat<(v4i32 (bitconvert v2i64:$A)),
830 (COPY_TO_REGCLASS $A, VRRC)>;
831def : Pat<(v8i16 (bitconvert v2i64:$A)),
832 (COPY_TO_REGCLASS $A, VRRC)>;
833def : Pat<(v16i8 (bitconvert v2i64:$A)),
834 (COPY_TO_REGCLASS $A, VRRC)>;
835
Hal Finkel9281c9a2014-03-26 18:26:30 +0000[diff] [blame]836def : Pat<(v2f64 (bitconvert v2i64:$A)),
837 (COPY_TO_REGCLASS $A, VRRC)>;
838def : Pat<(v2i64 (bitconvert v2f64:$A)),
839 (COPY_TO_REGCLASS $A, VRRC)>;
840
Hal Finkel5c0d1452014-03-30 13:22:59 +0000[diff] [blame]841// sign extension patterns
842// To extend "in place" from v2i32 to v2i64, we have input data like:
843// | undef | i32 | undef | i32 |
844// but xvcvsxwdp expects the input in big-Endian format:
845// | i32 | undef | i32 | undef |
846// so we need to shift everything to the left by one i32 (word) before
847// the conversion.
848def : Pat<(sext_inreg v2i64:$C, v2i32),
849 (XVCVDPSXDS (XVCVSXWDP (XXSLDWI $C, $C, 1)))>;
850def : Pat<(v2f64 (sint_to_fp (sext_inreg v2i64:$C, v2i32))),
851 (XVCVSXWDP (XXSLDWI $C, $C, 1))>;
852
Bill Schmidt2d1128a2014-10-17 15:13:38 +0000[diff] [blame]853// Loads.
854def : Pat<(v4i32 (load xoaddr:$src)), (LXVW4X xoaddr:$src)>;
855
856// Stores.
857def : Pat<(store v4i32:$rS, xoaddr:$dst),
858 (STXVW4X $rS, xoaddr:$dst)>;
859
Bill Schmidt61e65232014-10-22 13:13:40 +0000[diff] [blame]860// Selects.
861def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETLT)),
862 (SELECT_VSRC (CRANDC $rhs, $lhs), $tval, $fval)>;
863def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETLE)),
864 (SELECT_VSRC (CRORC $rhs, $lhs), $tval, $fval)>;
865def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETEQ)),
866 (SELECT_VSRC (CREQV $lhs, $rhs), $tval, $fval)>;
867def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETGE)),
868 (SELECT_VSRC (CRORC $lhs, $rhs), $tval, $fval)>;
869def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETGT)),
870 (SELECT_VSRC (CRANDC $lhs, $rhs), $tval, $fval)>;
871def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETNE)),
872 (SELECT_VSRC (CRXOR $lhs, $rhs), $tval, $fval)>;
873
Bill Schmidt9c54bbd2014-10-22 16:58:20 +0000[diff] [blame]874def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETLT)),
875 (SELECT_VSFRC (CRANDC $rhs, $lhs), $tval, $fval)>;
876def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETLE)),
877 (SELECT_VSFRC (CRORC $rhs, $lhs), $tval, $fval)>;
878def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETEQ)),
879 (SELECT_VSFRC (CREQV $lhs, $rhs), $tval, $fval)>;
880def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETGE)),
881 (SELECT_VSFRC (CRORC $lhs, $rhs), $tval, $fval)>;
882def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETGT)),
883 (SELECT_VSFRC (CRANDC $lhs, $rhs), $tval, $fval)>;
884def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETNE)),
885 (SELECT_VSFRC (CRXOR $lhs, $rhs), $tval, $fval)>;
886
Hal Finkel27774d92014-03-13 07:58:58 +0000[diff] [blame]887} // AddedComplexity
888} // HasVSX
889