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Craig Topperc0aa97b2020-03-28 15:30:13 -07001; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
Simon Pilgrimfe9403d2020-11-10 12:48:02 +00002; RUN: opt < %s -cost-model -mtriple=x86_64-apple-darwin -analyze -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
3; RUN: opt < %s -cost-model -mtriple=x86_64-apple-darwin -analyze -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE
4; RUN: opt < %s -cost-model -mtriple=x86_64-apple-darwin -analyze -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE
5; RUN: opt < %s -cost-model -mtriple=x86_64-apple-darwin -analyze -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE
6; RUN: opt < %s -cost-model -mtriple=x86_64-apple-darwin -analyze -mattr=+avx | FileCheck %s --check-prefixes=AVX
7; RUN: opt < %s -cost-model -mtriple=x86_64-apple-darwin -analyze -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
8; RUN: opt < %s -cost-model -mtriple=x86_64-apple-darwin -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512
9; RUN: opt < %s -cost-model -mtriple=x86_64-apple-darwin -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512
10; RUN: opt < %s -cost-model -mtriple=x86_64-apple-darwin -analyze -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=AVX512
Craig Topperc0aa97b2020-03-28 15:30:13 -070011
12define i32 @reduce_f64(i32 %arg) {
13; SSE-LABEL: 'reduce_f64'
Amara Emerson322d0af2020-10-02 18:30:53 -070014; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V1 = call double @llvm.vector.reduce.fmax.v1f64(<1 x double> undef)
15; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2 = call double @llvm.vector.reduce.fmax.v2f64(<2 x double> undef)
16; SSE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4 = call double @llvm.vector.reduce.fmax.v4f64(<4 x double> undef)
17; SSE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8 = call double @llvm.vector.reduce.fmax.v8f64(<8 x double> undef)
18; SSE-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V16 = call double @llvm.vector.reduce.fmax.v16f64(<16 x double> undef)
Craig Topperc0aa97b2020-03-28 15:30:13 -070019; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
20;
21; AVX-LABEL: 'reduce_f64'
Amara Emerson322d0af2020-10-02 18:30:53 -070022; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V1 = call double @llvm.vector.reduce.fmax.v1f64(<1 x double> undef)
23; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2 = call double @llvm.vector.reduce.fmax.v2f64(<2 x double> undef)
24; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4 = call double @llvm.vector.reduce.fmax.v4f64(<4 x double> undef)
25; AVX-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8 = call double @llvm.vector.reduce.fmax.v8f64(<8 x double> undef)
26; AVX-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V16 = call double @llvm.vector.reduce.fmax.v16f64(<16 x double> undef)
Craig Topperc0aa97b2020-03-28 15:30:13 -070027; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
28;
29; AVX512-LABEL: 'reduce_f64'
Amara Emerson322d0af2020-10-02 18:30:53 -070030; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V1 = call double @llvm.vector.reduce.fmax.v1f64(<1 x double> undef)
31; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2 = call double @llvm.vector.reduce.fmax.v2f64(<2 x double> undef)
32; AVX512-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4 = call double @llvm.vector.reduce.fmax.v4f64(<4 x double> undef)
33; AVX512-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V8 = call double @llvm.vector.reduce.fmax.v8f64(<8 x double> undef)
34; AVX512-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V16 = call double @llvm.vector.reduce.fmax.v16f64(<16 x double> undef)
Craig Topperc0aa97b2020-03-28 15:30:13 -070035; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
36;
Amara Emerson322d0af2020-10-02 18:30:53 -070037 %V1 = call double @llvm.vector.reduce.fmax.v1f64(<1 x double> undef)
38 %V2 = call double @llvm.vector.reduce.fmax.v2f64(<2 x double> undef)
39 %V4 = call double @llvm.vector.reduce.fmax.v4f64(<4 x double> undef)
40 %V8 = call double @llvm.vector.reduce.fmax.v8f64(<8 x double> undef)
41 %V16 = call double @llvm.vector.reduce.fmax.v16f64(<16 x double> undef)
Craig Topperc0aa97b2020-03-28 15:30:13 -070042 ret i32 undef
43}
44
45define i32 @reduce_f32(i32 %arg) {
Craig Topper5625e6a2020-04-09 16:58:28 -070046; SSE-LABEL: 'reduce_f32'
Amara Emerson322d0af2020-10-02 18:30:53 -070047; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmax.v1f32(<1 x float> undef)
48; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2 = call float @llvm.vector.reduce.fmax.v2f32(<2 x float> undef)
49; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4 = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> undef)
50; SSE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8 = call float @llvm.vector.reduce.fmax.v8f32(<8 x float> undef)
51; SSE-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V16 = call float @llvm.vector.reduce.fmax.v16f32(<16 x float> undef)
52; SSE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V32 = call float @llvm.vector.reduce.fmax.v32f32(<32 x float> undef)
Craig Topper5625e6a2020-04-09 16:58:28 -070053; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
Craig Topperc0aa97b2020-03-28 15:30:13 -070054;
55; AVX-LABEL: 'reduce_f32'
Amara Emerson322d0af2020-10-02 18:30:53 -070056; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmax.v1f32(<1 x float> undef)
57; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2 = call float @llvm.vector.reduce.fmax.v2f32(<2 x float> undef)
58; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4 = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> undef)
59; AVX-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V8 = call float @llvm.vector.reduce.fmax.v8f32(<8 x float> undef)
60; AVX-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V16 = call float @llvm.vector.reduce.fmax.v16f32(<16 x float> undef)
61; AVX-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V32 = call float @llvm.vector.reduce.fmax.v32f32(<32 x float> undef)
Craig Topperc0aa97b2020-03-28 15:30:13 -070062; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
63;
64; AVX512-LABEL: 'reduce_f32'
Amara Emerson322d0af2020-10-02 18:30:53 -070065; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmax.v1f32(<1 x float> undef)
66; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2 = call float @llvm.vector.reduce.fmax.v2f32(<2 x float> undef)
67; AVX512-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4 = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> undef)
68; AVX512-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V8 = call float @llvm.vector.reduce.fmax.v8f32(<8 x float> undef)
69; AVX512-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16 = call float @llvm.vector.reduce.fmax.v16f32(<16 x float> undef)
70; AVX512-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V32 = call float @llvm.vector.reduce.fmax.v32f32(<32 x float> undef)
Craig Topperc0aa97b2020-03-28 15:30:13 -070071; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
72;
Amara Emerson322d0af2020-10-02 18:30:53 -070073 %V1 = call float @llvm.vector.reduce.fmax.v1f32(<1 x float> undef)
74 %V2 = call float @llvm.vector.reduce.fmax.v2f32(<2 x float> undef)
75 %V4 = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> undef)
76 %V8 = call float @llvm.vector.reduce.fmax.v8f32(<8 x float> undef)
77 %V16 = call float @llvm.vector.reduce.fmax.v16f32(<16 x float> undef)
78 %V32 = call float @llvm.vector.reduce.fmax.v32f32(<32 x float> undef)
Craig Topperc0aa97b2020-03-28 15:30:13 -070079 ret i32 undef
80}
81
Amara Emerson322d0af2020-10-02 18:30:53 -070082declare double @llvm.vector.reduce.fmax.v1f64(<1 x double>)
83declare double @llvm.vector.reduce.fmax.v2f64(<2 x double>)
84declare double @llvm.vector.reduce.fmax.v4f64(<4 x double>)
85declare double @llvm.vector.reduce.fmax.v8f64(<8 x double>)
86declare double @llvm.vector.reduce.fmax.v16f64(<16 x double>)
Craig Topperc0aa97b2020-03-28 15:30:13 -070087
Amara Emerson322d0af2020-10-02 18:30:53 -070088declare float @llvm.vector.reduce.fmax.v1f32(<1 x float>)
89declare float @llvm.vector.reduce.fmax.v2f32(<2 x float>)
90declare float @llvm.vector.reduce.fmax.v4f32(<4 x float>)
91declare float @llvm.vector.reduce.fmax.v8f32(<8 x float>)
92declare float @llvm.vector.reduce.fmax.v16f32(<16 x float>)
93declare float @llvm.vector.reduce.fmax.v32f32(<32 x float>)