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Chad Rosier7a21bb12016-03-14 18:10:20 +00001//===-- MipsHazardSchedule.cpp - Workaround pipeline hazards --------------===//
Daniel Sanderse8efff32016-03-14 16:24:05 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10/// This pass is used to workaround certain pipeline hazards. For now, this covers
11/// compact branch hazards. In future this pass can be extended to other pipeline
12/// hazards, such as various MIPS1 hazards, processor errata that require
13/// instruction reorganization, etc.
14///
15/// This pass has to run after the delay slot filler as that pass can introduce
16/// pipeline hazards, hence the existing hazard recognizer is not suitable.
17///
18/// Hazards handled: forbidden slots for MIPSR6.
19///
20/// A forbidden slot hazard occurs when a compact branch instruction is executed
21/// and the adjacent instruction in memory is a control transfer instruction such
22/// as a branch or jump, ERET, ERETNC, DERET, WAIT and PAUSE.
23///
24/// For example:
25///
26/// 0x8004 bnec a1,v0,<P+0x18>
27/// 0x8008 beqc a1,a2,<P+0x54>
28///
29/// In such cases, the processor is required to signal a Reserved Instruction
30/// exception.
31///
32/// Here, if the instruction at 0x8004 is executed, the processor will raise an
33/// exception as there is a control transfer instruction at 0x8008.
34///
35/// There are two sources of forbidden slot hazards:
36///
37/// A) A previous pass has created a compact branch directly.
38/// B) Transforming a delay slot branch into compact branch. This case can be
39/// difficult to process as lookahead for hazards is insufficent, as
40/// backwards delay slot fillling can also produce hazards in previously
41/// processed instuctions.
42///
43//===----------------------------------------------------------------------===//
44
45#include "Mips.h"
46#include "MipsInstrInfo.h"
47#include "MipsSEInstrInfo.h"
48#include "MipsTargetMachine.h"
49#include "llvm/IR/Function.h"
50#include "llvm/ADT/Statistic.h"
51#include "llvm/CodeGen/MachineFunctionPass.h"
52#include "llvm/CodeGen/MachineInstrBuilder.h"
53#include "llvm/Support/CommandLine.h"
54#include "llvm/Target/TargetInstrInfo.h"
55#include "llvm/Target/TargetMachine.h"
56#include "llvm/Target/TargetRegisterInfo.h"
57
58using namespace llvm;
59
60#define DEBUG_TYPE "mips-hazard-schedule"
61
62STATISTIC(NumInsertedNops, "Number of nops inserted");
63
64namespace {
65
66typedef MachineBasicBlock::iterator Iter;
67typedef MachineBasicBlock::reverse_iterator ReverseIter;
68
69class MipsHazardSchedule : public MachineFunctionPass {
70
71public:
Chad Rosier7a21bb12016-03-14 18:10:20 +000072 MipsHazardSchedule() : MachineFunctionPass(ID) {}
Daniel Sanderse8efff32016-03-14 16:24:05 +000073
74 const char *getPassName() const override { return "Mips Hazard Schedule"; }
75
76 bool runOnMachineFunction(MachineFunction &F) override;
77
78private:
79 static char ID;
Daniel Sanderse8efff32016-03-14 16:24:05 +000080};
81
82char MipsHazardSchedule::ID = 0;
83} // end of anonymous namespace
84
85/// Returns a pass that clears pipeline hazards.
Chad Rosier7a21bb12016-03-14 18:10:20 +000086FunctionPass *llvm::createMipsHazardSchedule() {
87 return new MipsHazardSchedule();
Daniel Sanderse8efff32016-03-14 16:24:05 +000088}
89
90bool MipsHazardSchedule::runOnMachineFunction(MachineFunction &MF) {
91
92 const MipsSubtarget *STI =
93 &static_cast<const MipsSubtarget &>(MF.getSubtarget());
94
95 // Forbidden slot hazards are only defined for MIPSR6.
96 if (!STI->hasMips32r6() || STI->inMicroMipsMode())
97 return false;
98
99 bool Changed = false;
100 const MipsInstrInfo *TII = STI->getInstrInfo();
101
102 for (MachineFunction::iterator FI = MF.begin(); FI != MF.end(); ++FI) {
103 for (Iter I = FI->begin(); I != FI->end(); ++I) {
104
105 // Forbidden slot hazard handling. Use lookahead over state.
106 if (!TII->HasForbiddenSlot(*I))
107 continue;
108
109 bool InsertNop = false;
110 // Next instruction in the basic block.
111 if (std::next(I) != FI->end() &&
112 !TII->SafeInForbiddenSlot(*std::next(I))) {
113 InsertNop = true;
114 } else {
115 // Next instruction in the physical successor basic block.
116 for (auto *Succ : FI->successors()) {
117 if (FI->isLayoutSuccessor(Succ) &&
118 Succ->getFirstNonDebugInstr() != Succ->end() &&
119 !TII->SafeInForbiddenSlot(*Succ->getFirstNonDebugInstr())) {
120 InsertNop = true;
121 break;
122 }
123 }
124 }
125
126 if (InsertNop) {
127 Changed = true;
128 MIBundleBuilder(I)
129 .append(BuildMI(MF, I->getDebugLoc(), TII->get(Mips::NOP)));
130 NumInsertedNops++;
131 }
132 }
133 }
134 return Changed;
135}