blob: 30410fe925432f82a441860f1e59ddd17b37560f [file] [log] [blame]
Colin LeMahieub8575b12015-06-13 21:46:39 +00001; RUN: llc -march=hexagon -enable-aa-sched-mi < %s
2; REQUIRES: asserts
3
4; Make sure the base is a register and not an address.
5
6define fastcc void @Get_lsp_pol(i32* nocapture %f) #0 {
7entry:
8 %f5 = alloca i32, align 4
9 %arrayidx103 = getelementptr inbounds i32, i32* %f, i32 4
10 store i32 0, i32* %arrayidx103, align 4
11 %f5.0.load185 = load volatile i32, i32* %f5, align 4
12 ret void
13}
14
15attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }