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Chandler Carruth985454e2012-07-18 18:58:22 +00001; Tests for the two-address instruction pass.
2; RUN: llc -march=arm -mcpu=cortex-a9 < %s | FileCheck %s
3
4define void @PR13378() nounwind {
5; This was orriginally a crasher trying to schedule the instructions.
6; CHECK: PR13378:
Evan Cheng90ae8f82012-09-18 01:42:45 +00007; CHECK: vld1.32
8; CHECK-NEXT: vst1.32
9; CHECK-NEXT: vst1.32
Chandler Carruth985454e2012-07-18 18:58:22 +000010; CHECK-NEXT: vmov.f32
Chandler Carruth985454e2012-07-18 18:58:22 +000011; CHECK-NEXT: vmov.f32
Evan Cheng90ae8f82012-09-18 01:42:45 +000012; CHECK-NEXT: vst1.32
Chandler Carruth985454e2012-07-18 18:58:22 +000013
14entry:
Evan Cheng363d73c2012-09-20 21:35:21 +000015 %0 = load <4 x float>* undef, align 4
16 store <4 x float> zeroinitializer, <4 x float>* undef, align 4
17 store <4 x float> %0, <4 x float>* undef, align 4
Chandler Carruth985454e2012-07-18 18:58:22 +000018 %1 = insertelement <4 x float> %0, float 1.000000e+00, i32 3
Evan Cheng363d73c2012-09-20 21:35:21 +000019 store <4 x float> %1, <4 x float>* undef, align 4
Chandler Carruth985454e2012-07-18 18:58:22 +000020 unreachable
21}