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gerrit-public.fairphone.software / toolchain / llvm-project / 20ad359b77767cf588f7025271bad5ca8a0bd82e / . / llvm / test / CodeGen / AArch64 / addsub.ll
blob: b64ad2a83d8736ff2568b7577bbc9216b35c5eda [file] [log] [blame]
Tim Northoverd1719a82014-04-14 12:50:41 +0000[diff] [blame]1; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-linux-gnu | FileCheck %s
Tim Northoverdb2860f42014-04-14 13:18:48 +0000[diff] [blame]2; RUN: llc -verify-machineinstrs < %s -mtriple=arm64-linux-gnu | FileCheck %s
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]3
4; Note that this should be refactored (for efficiency if nothing else)
5; when the PCS is implemented so we don't have to worry about the
6; loads and stores.
7
8@var_i32 = global i32 42
9@var_i64 = global i64 0
10
11; Add pure 12-bit immediates:
12define void @add_small() {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]13; CHECK-LABEL: add_small:
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]14
15; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, #4095
16 %val32 = load i32* @var_i32
17 %newval32 = add i32 %val32, 4095
18 store i32 %newval32, i32* @var_i32
19
20; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, #52
21 %val64 = load i64* @var_i64
22 %newval64 = add i64 %val64, 52
23 store i64 %newval64, i64* @var_i64
24
25 ret void
26}
27
28; Add 12-bit immediates, shifted left by 12 bits
29define void @add_med() {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]30; CHECK-LABEL: add_med:
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]31
Tim Northoverd1719a82014-04-14 12:50:41 +0000[diff] [blame]32; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{#3567, lsl #12|#14610432}}
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]33 %val32 = load i32* @var_i32
34 %newval32 = add i32 %val32, 14610432 ; =0xdef000
35 store i32 %newval32, i32* @var_i32
36
Tim Northoverd1719a82014-04-14 12:50:41 +0000[diff] [blame]37; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{#4095, lsl #12|#16773120}}
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]38 %val64 = load i64* @var_i64
39 %newval64 = add i64 %val64, 16773120 ; =0xfff000
40 store i64 %newval64, i64* @var_i64
41
42 ret void
43}
44
45; Subtract 12-bit immediates
46define void @sub_small() {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]47; CHECK-LABEL: sub_small:
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]48
49; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, #4095
50 %val32 = load i32* @var_i32
51 %newval32 = sub i32 %val32, 4095
52 store i32 %newval32, i32* @var_i32
53
54; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, #52
55 %val64 = load i64* @var_i64
56 %newval64 = sub i64 %val64, 52
57 store i64 %newval64, i64* @var_i64
58
59 ret void
60}
61
62; Subtract 12-bit immediates, shifted left by 12 bits
63define void @sub_med() {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]64; CHECK-LABEL: sub_med:
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]65
Tim Northoverd1719a82014-04-14 12:50:41 +0000[diff] [blame]66; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, {{#3567, lsl #12|#14610432}}
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]67 %val32 = load i32* @var_i32
68 %newval32 = sub i32 %val32, 14610432 ; =0xdef000
69 store i32 %newval32, i32* @var_i32
70
Tim Northoverd1719a82014-04-14 12:50:41 +0000[diff] [blame]71; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, {{#4095, lsl #12|#16773120}}
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]72 %val64 = load i64* @var_i64
73 %newval64 = sub i64 %val64, 16773120 ; =0xfff000
74 store i64 %newval64, i64* @var_i64
75
76 ret void
77}
78
79define void @testing() {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]80; CHECK-LABEL: testing:
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]81 %val = load i32* @var_i32
82
83; CHECK: cmp {{w[0-9]+}}, #4095
Tim Northoverd1719a82014-04-14 12:50:41 +0000[diff] [blame]84; CHECK: b.ne [[RET:.?LBB[0-9]+_[0-9]+]]
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]85 %cmp_pos_small = icmp ne i32 %val, 4095
86 br i1 %cmp_pos_small, label %ret, label %test2
87
88test2:
Tim Northoverd1719a82014-04-14 12:50:41 +0000[diff] [blame]89; CHECK: cmp {{w[0-9]+}}, {{#3567, lsl #12|#14610432}}
Tim Northover20ad3592014-04-30 13:14:03 +0000[diff] [blame^]90; CHECK: b.lo [[RET]]
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]91 %newval2 = add i32 %val, 1
92 store i32 %newval2, i32* @var_i32
93 %cmp_pos_big = icmp ult i32 %val, 14610432
94 br i1 %cmp_pos_big, label %ret, label %test3
95
96test3:
97; CHECK: cmp {{w[0-9]+}}, #123
Tim Northoverd1719a82014-04-14 12:50:41 +0000[diff] [blame]98; CHECK: b.lt [[RET]]
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]99 %newval3 = add i32 %val, 2
100 store i32 %newval3, i32* @var_i32
101 %cmp_pos_slt = icmp slt i32 %val, 123
102 br i1 %cmp_pos_slt, label %ret, label %test4
103
104test4:
105; CHECK: cmp {{w[0-9]+}}, #321
Tim Northoverd1719a82014-04-14 12:50:41 +0000[diff] [blame]106; CHECK: b.gt [[RET]]
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]107 %newval4 = add i32 %val, 3
108 store i32 %newval4, i32* @var_i32
109 %cmp_pos_sgt = icmp sgt i32 %val, 321
110 br i1 %cmp_pos_sgt, label %ret, label %test5
111
112test5:
113; CHECK: cmn {{w[0-9]+}}, #444
Tim Northoverd1719a82014-04-14 12:50:41 +0000[diff] [blame]114; CHECK: b.gt [[RET]]
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]115 %newval5 = add i32 %val, 4
116 store i32 %newval5, i32* @var_i32
117 %cmp_neg_uge = icmp sgt i32 %val, -444
118 br i1 %cmp_neg_uge, label %ret, label %test6
119
120test6:
121 %newval6 = add i32 %val, 5
122 store i32 %newval6, i32* @var_i32
123 ret void
124
125ret:
126 ret void
127}
128; TODO: adds/subs