blob: 6e411ce5e017019684039a7dec1b59d059fdadbc [file] [log] [blame]
Matt Arsenault21a43822017-04-06 21:09:53 +00001; RUN: not llc -march=amdgcn < %s 2>&1 | FileCheck -check-prefix=ERR %s
2; RUN: not llc -march=amdgcn < %s | FileCheck -check-prefix=GCN %s
3
4; ERR: error: <unknown>:0:0: in function illegal_vgpr_to_sgpr_copy_i32 void (): illegal SGPR to VGPR copy
5; GCN: ; illegal copy v1 to s9
6
7define amdgpu_kernel void @illegal_vgpr_to_sgpr_copy_i32() #0 {
8 %vgpr = call i32 asm sideeffect "; def $0", "=${VGPR1}"()
9 call void asm sideeffect "; use $0", "${SGPR9}"(i32 %vgpr)
10 ret void
11}
12
13; ERR: error: <unknown>:0:0: in function illegal_vgpr_to_sgpr_copy_v2i32 void (): illegal SGPR to VGPR copy
14; GCN: ; illegal copy v[0:1] to s[10:11]
15define amdgpu_kernel void @illegal_vgpr_to_sgpr_copy_v2i32() #0 {
16 %vgpr = call <2 x i32> asm sideeffect "; def $0", "=${VGPR0_VGPR1}"()
17 call void asm sideeffect "; use $0", "${SGPR10_SGPR11}"(<2 x i32> %vgpr)
18 ret void
19}
20
21; ERR: error: <unknown>:0:0: in function illegal_vgpr_to_sgpr_copy_v4i32 void (): illegal SGPR to VGPR copy
22; GCN: ; illegal copy v[0:3] to s[8:11]
23define amdgpu_kernel void @illegal_vgpr_to_sgpr_copy_v4i32() #0 {
24 %vgpr = call <4 x i32> asm sideeffect "; def $0", "=${VGPR0_VGPR1_VGPR2_VGPR3}"()
25 call void asm sideeffect "; use $0", "${SGPR8_SGPR9_SGPR10_SGPR11}"(<4 x i32> %vgpr)
26 ret void
27}
28
29; ERR: error: <unknown>:0:0: in function illegal_vgpr_to_sgpr_copy_v8i32 void (): illegal SGPR to VGPR copy
30; GCN: ; illegal copy v[0:7] to s[8:15]
31define amdgpu_kernel void @illegal_vgpr_to_sgpr_copy_v8i32() #0 {
32 %vgpr = call <8 x i32> asm sideeffect "; def $0", "=${VGPR0_VGPR1_VGPR2_VGPR3_VGPR4_VGPR5_VGPR6_VGPR7}"()
33 call void asm sideeffect "; use $0", "${SGPR8_SGPR9_SGPR10_SGPR11_SGPR12_SGPR13_SGPR14_SGPR15}"(<8 x i32> %vgpr)
34 ret void
35}
36
37; ERR error: <unknown>:0:0: in function illegal_vgpr_to_sgpr_copy_v16i32 void (): illegal SGPR to VGPR copy
38; GCN: ; illegal copy v[0:15] to s[16:31]
39define amdgpu_kernel void @illegal_vgpr_to_sgpr_copy_v16i32() #0 {
40 %vgpr = call <16 x i32> asm sideeffect "; def $0", "=${VGPR0_VGPR1_VGPR2_VGPR3_VGPR4_VGPR5_VGPR6_VGPR7_VGPR8_VGPR9_VGPR10_VGPR11_VGPR12_VGPR13_VGPR14_VGPR15}"()
41 call void asm sideeffect "; use $0", "${SGPR16_SGPR17_SGPR18_SGPR19_SGPR20_SGPR21_SGPR22_SGPR23_SGPR24_SGPR25_SGPR26_SGPR27_SGPR28_SGPR29_SGPR30_SGPR31}"(<16 x i32> %vgpr)
42 ret void
43}
44
45attributes #0 = { nounwind }