| Alex Bradbury | 22c091f | 2018-11-15 10:11:31 +0000 | [diff] [blame^] | 1 | //===- RISCVMatInt.h - Immediate materialisation ---------------*- C++ -*--===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | |
| 10 | #ifndef LLVM_LIB_TARGET_RISCV_MATINT_H |
| 11 | #define LLVM_LIB_TARGET_RISCV_MATINT_H |
| 12 | |
| 13 | #include "llvm/ADT/SmallVector.h" |
| 14 | #include "llvm/Support/MachineValueType.h" |
| 15 | #include <cstdint> |
| 16 | |
| 17 | namespace llvm { |
| 18 | |
| 19 | namespace RISCVMatInt { |
| 20 | struct Inst { |
| 21 | unsigned Opc; |
| 22 | int64_t Imm; |
| 23 | |
| 24 | Inst(unsigned Opc, int64_t Imm) : Opc(Opc), Imm(Imm) {} |
| 25 | }; |
| 26 | using InstSeq = SmallVector<Inst, 8>; |
| 27 | |
| 28 | // Helper to generate an instruction sequence that will materialise the given |
| 29 | // immediate value into a register. A sequence of instructions represented by |
| 30 | // a simple struct produced rather than directly emitting the instructions in |
| 31 | // order to allow this helper to be used from both the MC layer and during |
| 32 | // instruction selection. |
| 33 | void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res); |
| 34 | } // namespace RISCVMatInt |
| 35 | } // namespace llvm |
| 36 | #endif |