blob: e9797eff712b7de2a61e57403e03c31e137dfd3f [file] [log] [blame]
Matt Arsenault6b930462017-07-13 21:43:42 +00001; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -amdgpu-annotate-kernel-features %s | FileCheck -check-prefix=HSA %s
2
Matt Arsenaulte15855d2017-07-17 22:35:50 +00003declare i32 @llvm.amdgcn.workgroup.id.x() #0
Matt Arsenault6b930462017-07-13 21:43:42 +00004declare i32 @llvm.amdgcn.workgroup.id.y() #0
5declare i32 @llvm.amdgcn.workgroup.id.z() #0
6
Matt Arsenaulte15855d2017-07-17 22:35:50 +00007declare i32 @llvm.amdgcn.workitem.id.x() #0
Matt Arsenault6b930462017-07-13 21:43:42 +00008declare i32 @llvm.amdgcn.workitem.id.y() #0
9declare i32 @llvm.amdgcn.workitem.id.z() #0
10
11declare i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr() #0
12declare i8 addrspace(2)* @llvm.amdgcn.queue.ptr() #0
Matt Arsenault23e4df62017-07-14 00:11:13 +000013declare i8 addrspace(2)* @llvm.amdgcn.kernarg.segment.ptr() #0
14declare i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr() #0
Matt Arsenault6b930462017-07-13 21:43:42 +000015declare i64 @llvm.amdgcn.dispatch.id() #0
16
Matt Arsenaulte15855d2017-07-17 22:35:50 +000017; HSA: define void @use_workitem_id_x() #1 {
18define void @use_workitem_id_x() #1 {
19 %val = call i32 @llvm.amdgcn.workitem.id.x()
20 store volatile i32 %val, i32 addrspace(1)* undef
21 ret void
22}
23
24; HSA: define void @use_workitem_id_y() #2 {
Matt Arsenault6b930462017-07-13 21:43:42 +000025define void @use_workitem_id_y() #1 {
26 %val = call i32 @llvm.amdgcn.workitem.id.y()
27 store volatile i32 %val, i32 addrspace(1)* undef
28 ret void
29}
30
Matt Arsenaulte15855d2017-07-17 22:35:50 +000031; HSA: define void @use_workitem_id_z() #3 {
Matt Arsenault6b930462017-07-13 21:43:42 +000032define void @use_workitem_id_z() #1 {
33 %val = call i32 @llvm.amdgcn.workitem.id.z()
34 store volatile i32 %val, i32 addrspace(1)* undef
35 ret void
36}
37
Matt Arsenaulte15855d2017-07-17 22:35:50 +000038; HSA: define void @use_workgroup_id_x() #4 {
39define void @use_workgroup_id_x() #1 {
40 %val = call i32 @llvm.amdgcn.workgroup.id.x()
41 store volatile i32 %val, i32 addrspace(1)* undef
42 ret void
43}
44
45; HSA: define void @use_workgroup_id_y() #5 {
Matt Arsenault6b930462017-07-13 21:43:42 +000046define void @use_workgroup_id_y() #1 {
47 %val = call i32 @llvm.amdgcn.workgroup.id.y()
48 store volatile i32 %val, i32 addrspace(1)* undef
49 ret void
50}
51
Matt Arsenaulte15855d2017-07-17 22:35:50 +000052; HSA: define void @use_workgroup_id_z() #6 {
Matt Arsenault6b930462017-07-13 21:43:42 +000053define void @use_workgroup_id_z() #1 {
54 %val = call i32 @llvm.amdgcn.workgroup.id.z()
55 store volatile i32 %val, i32 addrspace(1)* undef
56 ret void
57}
58
Matt Arsenaulte15855d2017-07-17 22:35:50 +000059; HSA: define void @use_dispatch_ptr() #7 {
Matt Arsenault6b930462017-07-13 21:43:42 +000060define void @use_dispatch_ptr() #1 {
61 %dispatch.ptr = call i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr()
62 store volatile i8 addrspace(2)* %dispatch.ptr, i8 addrspace(2)* addrspace(1)* undef
63 ret void
64}
65
Matt Arsenaulte15855d2017-07-17 22:35:50 +000066; HSA: define void @use_queue_ptr() #8 {
Matt Arsenault6b930462017-07-13 21:43:42 +000067define void @use_queue_ptr() #1 {
68 %queue.ptr = call i8 addrspace(2)* @llvm.amdgcn.queue.ptr()
69 store volatile i8 addrspace(2)* %queue.ptr, i8 addrspace(2)* addrspace(1)* undef
70 ret void
71}
72
Matt Arsenaulte15855d2017-07-17 22:35:50 +000073; HSA: define void @use_dispatch_id() #9 {
Matt Arsenault6b930462017-07-13 21:43:42 +000074define void @use_dispatch_id() #1 {
75 %val = call i64 @llvm.amdgcn.dispatch.id()
76 store volatile i64 %val, i64 addrspace(1)* undef
77 ret void
78}
79
Matt Arsenaulte15855d2017-07-17 22:35:50 +000080; HSA: define void @use_workgroup_id_y_workgroup_id_z() #10 {
Matt Arsenault6b930462017-07-13 21:43:42 +000081define void @use_workgroup_id_y_workgroup_id_z() #1 {
82 %val0 = call i32 @llvm.amdgcn.workgroup.id.y()
83 %val1 = call i32 @llvm.amdgcn.workgroup.id.z()
84 store volatile i32 %val0, i32 addrspace(1)* undef
85 store volatile i32 %val1, i32 addrspace(1)* undef
86 ret void
87}
88
Matt Arsenaulte15855d2017-07-17 22:35:50 +000089; HSA: define void @func_indirect_use_workitem_id_x() #1 {
90define void @func_indirect_use_workitem_id_x() #1 {
91 call void @use_workitem_id_x()
92 ret void
93}
94
95; HSA: define void @kernel_indirect_use_workitem_id_x() #1 {
96define void @kernel_indirect_use_workitem_id_x() #1 {
97 call void @use_workitem_id_x()
98 ret void
99}
100
101; HSA: define void @func_indirect_use_workitem_id_y() #2 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000102define void @func_indirect_use_workitem_id_y() #1 {
103 call void @use_workitem_id_y()
104 ret void
105}
106
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000107; HSA: define void @func_indirect_use_workitem_id_z() #3 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000108define void @func_indirect_use_workitem_id_z() #1 {
109 call void @use_workitem_id_z()
110 ret void
111}
112
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000113; HSA: define void @func_indirect_use_workgroup_id_x() #4 {
114define void @func_indirect_use_workgroup_id_x() #1 {
115 call void @use_workgroup_id_x()
116 ret void
117}
118
119; HSA: define void @kernel_indirect_use_workgroup_id_x() #4 {
120define void @kernel_indirect_use_workgroup_id_x() #1 {
121 call void @use_workgroup_id_x()
122 ret void
123}
124
125; HSA: define void @func_indirect_use_workgroup_id_y() #5 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000126define void @func_indirect_use_workgroup_id_y() #1 {
127 call void @use_workgroup_id_y()
128 ret void
129}
130
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000131; HSA: define void @func_indirect_use_workgroup_id_z() #6 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000132define void @func_indirect_use_workgroup_id_z() #1 {
133 call void @use_workgroup_id_z()
134 ret void
135}
136
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000137; HSA: define void @func_indirect_indirect_use_workgroup_id_y() #5 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000138define void @func_indirect_indirect_use_workgroup_id_y() #1 {
139 call void @func_indirect_use_workgroup_id_y()
140 ret void
141}
142
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000143; HSA: define void @indirect_x2_use_workgroup_id_y() #5 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000144define void @indirect_x2_use_workgroup_id_y() #1 {
145 call void @func_indirect_indirect_use_workgroup_id_y()
146 ret void
147}
148
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000149; HSA: define void @func_indirect_use_dispatch_ptr() #7 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000150define void @func_indirect_use_dispatch_ptr() #1 {
151 call void @use_dispatch_ptr()
152 ret void
153}
154
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000155; HSA: define void @func_indirect_use_queue_ptr() #8 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000156define void @func_indirect_use_queue_ptr() #1 {
157 call void @use_queue_ptr()
158 ret void
159}
160
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000161; HSA: define void @func_indirect_use_dispatch_id() #9 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000162define void @func_indirect_use_dispatch_id() #1 {
163 call void @use_dispatch_id()
164 ret void
165}
166
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000167; HSA: define void @func_indirect_use_workgroup_id_y_workgroup_id_z() #11 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000168define void @func_indirect_use_workgroup_id_y_workgroup_id_z() #1 {
169 call void @func_indirect_use_workgroup_id_y_workgroup_id_z()
170 ret void
171}
172
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000173; HSA: define void @recursive_use_workitem_id_y() #2 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000174define void @recursive_use_workitem_id_y() #1 {
175 %val = call i32 @llvm.amdgcn.workitem.id.y()
176 store volatile i32 %val, i32 addrspace(1)* undef
177 call void @recursive_use_workitem_id_y()
178 ret void
179}
180
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000181; HSA: define void @call_recursive_use_workitem_id_y() #2 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000182define void @call_recursive_use_workitem_id_y() #1 {
183 call void @recursive_use_workitem_id_y()
184 ret void
185}
186
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000187; HSA: define void @use_group_to_flat_addrspacecast(i32 addrspace(3)* %ptr) #8 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000188define void @use_group_to_flat_addrspacecast(i32 addrspace(3)* %ptr) #1 {
189 %stof = addrspacecast i32 addrspace(3)* %ptr to i32 addrspace(4)*
190 store volatile i32 0, i32 addrspace(4)* %stof
191 ret void
192}
193
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000194; HSA: define void @use_group_to_flat_addrspacecast_gfx9(i32 addrspace(3)* %ptr) #12 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000195define void @use_group_to_flat_addrspacecast_gfx9(i32 addrspace(3)* %ptr) #2 {
196 %stof = addrspacecast i32 addrspace(3)* %ptr to i32 addrspace(4)*
197 store volatile i32 0, i32 addrspace(4)* %stof
198 ret void
199}
200
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000201; HSA: define void @use_group_to_flat_addrspacecast_queue_ptr_gfx9(i32 addrspace(3)* %ptr) #13 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000202define void @use_group_to_flat_addrspacecast_queue_ptr_gfx9(i32 addrspace(3)* %ptr) #2 {
203 %stof = addrspacecast i32 addrspace(3)* %ptr to i32 addrspace(4)*
204 store volatile i32 0, i32 addrspace(4)* %stof
205 call void @func_indirect_use_queue_ptr()
206 ret void
207}
208
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000209; HSA: define void @indirect_use_group_to_flat_addrspacecast() #8 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000210define void @indirect_use_group_to_flat_addrspacecast() #1 {
211 call void @use_group_to_flat_addrspacecast(i32 addrspace(3)* null)
212 ret void
213}
214
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000215; HSA: define void @indirect_use_group_to_flat_addrspacecast_gfx9() #11 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000216define void @indirect_use_group_to_flat_addrspacecast_gfx9() #1 {
217 call void @use_group_to_flat_addrspacecast_gfx9(i32 addrspace(3)* null)
218 ret void
219}
220
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000221; HSA: define void @indirect_use_group_to_flat_addrspacecast_queue_ptr_gfx9() #8 {
Matt Arsenault6b930462017-07-13 21:43:42 +0000222define void @indirect_use_group_to_flat_addrspacecast_queue_ptr_gfx9() #1 {
223 call void @use_group_to_flat_addrspacecast_queue_ptr_gfx9(i32 addrspace(3)* null)
224 ret void
225}
226
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000227; HSA: define void @use_kernarg_segment_ptr() #14 {
Matt Arsenault23e4df62017-07-14 00:11:13 +0000228define void @use_kernarg_segment_ptr() #1 {
229 %kernarg.segment.ptr = call i8 addrspace(2)* @llvm.amdgcn.kernarg.segment.ptr()
230 store volatile i8 addrspace(2)* %kernarg.segment.ptr, i8 addrspace(2)* addrspace(1)* undef
231 ret void
232}
233
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000234; HSA: define void @func_indirect_use_kernarg_segment_ptr() #14 {
Matt Arsenault23e4df62017-07-14 00:11:13 +0000235define void @func_indirect_use_kernarg_segment_ptr() #1 {
236 call void @use_kernarg_segment_ptr()
237 ret void
238}
239
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000240; HSA: define void @use_implicitarg_ptr() #14 {
Matt Arsenault23e4df62017-07-14 00:11:13 +0000241define void @use_implicitarg_ptr() #1 {
242 %implicitarg.ptr = call i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr()
243 store volatile i8 addrspace(2)* %implicitarg.ptr, i8 addrspace(2)* addrspace(1)* undef
244 ret void
245}
246
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000247; HSA: define void @func_indirect_use_implicitarg_ptr() #14 {
Matt Arsenault23e4df62017-07-14 00:11:13 +0000248define void @func_indirect_use_implicitarg_ptr() #1 {
249 call void @use_implicitarg_ptr()
250 ret void
251}
252
Matt Arsenault254ad3d2017-07-18 16:44:58 +0000253; HSA: declare void @external.func() #15
254declare void @external.func() #3
255
256; HSA: define internal void @defined.func() #15 {
257define internal void @defined.func() #3 {
258 ret void
259}
260
261; HSA: define void @func_call_external() #15 {
262define void @func_call_external() #3 {
263 call void @external.func()
264 ret void
265}
266
267; HSA: define void @func_call_defined() #15 {
268define void @func_call_defined() #3 {
269 call void @defined.func()
270 ret void
271}
272
273; HSA: define void @func_call_asm() #15 {
274define void @func_call_asm() #3 {
275 call void asm sideeffect "", ""() #3
276 ret void
277}
278
279; HSA: define amdgpu_kernel void @kern_call_external() #16 {
280define amdgpu_kernel void @kern_call_external() #3 {
281 call void @external.func()
282 ret void
283}
284
285; HSA: define amdgpu_kernel void @func_kern_defined() #16 {
286define amdgpu_kernel void @func_kern_defined() #3 {
287 call void @defined.func()
288 ret void
289}
290
Matt Arsenault6b930462017-07-13 21:43:42 +0000291attributes #0 = { nounwind readnone speculatable }
292attributes #1 = { nounwind "target-cpu"="fiji" }
293attributes #2 = { nounwind "target-cpu"="gfx900" }
Matt Arsenault254ad3d2017-07-18 16:44:58 +0000294attributes #3 = { nounwind }
Matt Arsenault6b930462017-07-13 21:43:42 +0000295
296; HSA: attributes #0 = { nounwind readnone speculatable }
Matt Arsenaulte15855d2017-07-17 22:35:50 +0000297; HSA: attributes #1 = { nounwind "amdgpu-work-item-id-x" "target-cpu"="fiji" }
298; HSA: attributes #2 = { nounwind "amdgpu-work-item-id-y" "target-cpu"="fiji" }
299; HSA: attributes #3 = { nounwind "amdgpu-work-item-id-z" "target-cpu"="fiji" }
300; HSA: attributes #4 = { nounwind "amdgpu-work-group-id-x" "target-cpu"="fiji" }
301; HSA: attributes #5 = { nounwind "amdgpu-work-group-id-y" "target-cpu"="fiji" }
302; HSA: attributes #6 = { nounwind "amdgpu-work-group-id-z" "target-cpu"="fiji" }
303; HSA: attributes #7 = { nounwind "amdgpu-dispatch-ptr" "target-cpu"="fiji" }
304; HSA: attributes #8 = { nounwind "amdgpu-queue-ptr" "target-cpu"="fiji" }
305; HSA: attributes #9 = { nounwind "amdgpu-dispatch-id" "target-cpu"="fiji" }
306; HSA: attributes #10 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" "target-cpu"="fiji" }
307; HSA: attributes #11 = { nounwind "target-cpu"="fiji" }
308; HSA: attributes #12 = { nounwind "target-cpu"="gfx900" }
309; HSA: attributes #13 = { nounwind "amdgpu-queue-ptr" "target-cpu"="gfx900" }
310; HSA: attributes #14 = { nounwind "amdgpu-kernarg-segment-ptr" "target-cpu"="fiji" }
Matt Arsenault254ad3d2017-07-18 16:44:58 +0000311; HSA: attributes #15 = { nounwind }
312; HSA: attributes #16 = { nounwind "amdgpu-flat-scratch" }