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Nick Lewyckyc3890d22015-07-29 22:32:47 +00001// WebAssemblyMachineFunctionInfo.h-WebAssembly machine function info-*- C++ -*-
Dan Gohman10e730a2015-06-29 23:51:55 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
11/// \brief This file declares WebAssembly-specific per-machine-function
12/// information.
13///
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
17#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
18
Derek Schuff9769deb2015-12-11 23:49:46 +000019#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000020#include "llvm/CodeGen/MachineRegisterInfo.h"
21
22namespace llvm {
23
24/// This class is derived from MachineFunctionInfo and contains private
25/// WebAssembly-specific information for each MachineFunction.
26class WebAssemblyFunctionInfo final : public MachineFunctionInfo {
27 MachineFunction &MF;
28
Dan Gohman754cd112015-11-11 01:33:02 +000029 std::vector<MVT> Params;
Dan Gohmane51c0582015-10-06 00:27:55 +000030
Dan Gohmancf4748f2015-11-12 17:04:33 +000031 /// A mapping from CodeGen vreg index to WebAssembly register number.
32 std::vector<unsigned> WARegs;
33
Dan Gohman1462faa2015-11-16 16:18:28 +000034 /// A mapping from CodeGen vreg index to a boolean value indicating whether
35 /// the given register is considered to be "stackified", meaning it has been
36 /// determined or made to meet the stack requirements:
37 /// - single use (per path)
38 /// - single def (per path)
Dan Gohman53d13992015-12-02 18:08:49 +000039 /// - defined and used in LIFO order with other stack registers
Dan Gohman1462faa2015-11-16 16:18:28 +000040 BitVector VRegStackified;
41
Derek Schuff9769deb2015-12-11 23:49:46 +000042 // One entry for each possible target reg. we expect it to be small.
43 std::vector<unsigned> PhysRegs;
44
Derek Schuff27501e22016-02-10 19:51:04 +000045 // A virtual register holding the pointer to the vararg buffer for vararg
46 // functions. It is created and set in TLI::LowerFormalArguments and read by
47 // TLI::LowerVASTART
48 unsigned VarargVreg = -1U;
49
50 public:
Derek Schuff9769deb2015-12-11 23:49:46 +000051 explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {
52 PhysRegs.resize(WebAssembly::NUM_TARGET_REGS, -1U);
53 }
Dan Gohman10e730a2015-06-29 23:51:55 +000054 ~WebAssemblyFunctionInfo() override;
Dan Gohmane51c0582015-10-06 00:27:55 +000055
Dan Gohman754cd112015-11-11 01:33:02 +000056 void addParam(MVT VT) { Params.push_back(VT); }
57 const std::vector<MVT> &getParams() const { return Params; }
58
Derek Schuff27501e22016-02-10 19:51:04 +000059 unsigned getVarargBufferVreg() const {
60 assert(VarargVreg != -1U && "Vararg vreg hasn't been set");
61 return VarargVreg;
62 }
63 void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; }
64
Dan Gohman058fce52015-11-13 00:21:05 +000065 static const unsigned UnusedReg = -1u;
66
Dan Gohman1462faa2015-11-16 16:18:28 +000067 void stackifyVReg(unsigned VReg) {
68 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
69 VRegStackified.resize(TargetRegisterInfo::virtReg2Index(VReg) + 1);
70 VRegStackified.set(TargetRegisterInfo::virtReg2Index(VReg));
71 }
Dan Gohmanbb372242016-01-26 03:39:31 +000072 void unstackifyVReg(unsigned VReg) {
73 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
74 return;
75 VRegStackified.reset(TargetRegisterInfo::virtReg2Index(VReg));
76 }
Dan Gohman1462faa2015-11-16 16:18:28 +000077 bool isVRegStackified(unsigned VReg) const {
78 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
79 return false;
80 return VRegStackified.test(TargetRegisterInfo::virtReg2Index(VReg));
81 }
82
Dan Gohman058fce52015-11-13 00:21:05 +000083 void initWARegs();
Dan Gohmancf4748f2015-11-12 17:04:33 +000084 void setWAReg(unsigned VReg, unsigned WAReg) {
Dan Gohman058fce52015-11-13 00:21:05 +000085 assert(WAReg != UnusedReg);
Dan Gohman80e34e02015-11-25 21:13:02 +000086 assert(TargetRegisterInfo::virtReg2Index(VReg) < WARegs.size());
Dan Gohmancf4748f2015-11-12 17:04:33 +000087 WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg;
88 }
Derek Schuff9769deb2015-12-11 23:49:46 +000089 unsigned getWAReg(unsigned Reg) const {
90 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
91 assert(TargetRegisterInfo::virtReg2Index(Reg) < WARegs.size());
92 return WARegs[TargetRegisterInfo::virtReg2Index(Reg)];
93 }
94 return PhysRegs[Reg];
Dan Gohmancf4748f2015-11-12 17:04:33 +000095 }
Dan Gohman80e34e02015-11-25 21:13:02 +000096 // If new virtual registers are created after initWARegs has been called,
97 // this function can be used to add WebAssembly register mappings for them.
98 void addWAReg(unsigned VReg, unsigned WAReg) {
99 assert(VReg = WARegs.size());
100 WARegs.push_back(WAReg);
101 }
Derek Schuff9769deb2015-12-11 23:49:46 +0000102
103 void addPReg(unsigned PReg, unsigned WAReg) {
104 assert(PReg < WebAssembly::NUM_TARGET_REGS);
105 assert(WAReg < -1U);
106 PhysRegs[PReg] = WAReg;
107 }
Derek Schuff83717cc2015-12-16 20:43:08 +0000108 const std::vector<unsigned> &getPhysRegs() const { return PhysRegs; }
Dan Gohman10e730a2015-06-29 23:51:55 +0000109};
110
111} // end namespace llvm
112
113#endif