Chris Lattner | 5da8e80 | 2003-08-03 15:47:49 +0000 | [diff] [blame] | 1 | //===- X86.td - Target definition file for the Intel X86 arch ---*- C++ -*-===// |
| 2 | // |
| 3 | // This is a target description file for the Intel i386 architecture, refered to |
| 4 | // here as the "X86" architecture. |
| 5 | // |
| 6 | //===----------------------------------------------------------------------===// |
| 7 | |
Chris Lattner | 2551080 | 2003-08-04 04:59:56 +0000 | [diff] [blame] | 8 | // Get the target-independent interfaces which we are implementing... |
Chris Lattner | 5da8e80 | 2003-08-03 15:47:49 +0000 | [diff] [blame] | 9 | // |
| 10 | include "../Target.td" |
| 11 | |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | // Register File Description |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
| 16 | include "X86RegisterInfo.td" |
| 17 | |
Chris Lattner | a8c3cff | 2003-08-03 18:19:37 +0000 | [diff] [blame] | 18 | //===----------------------------------------------------------------------===// |
| 19 | // Instruction Descriptions |
| 20 | //===----------------------------------------------------------------------===// |
| 21 | |
Chris Lattner | 59a4a91 | 2003-08-03 21:54:21 +0000 | [diff] [blame] | 22 | include "X86InstrInfo.td" |
| 23 | |
Chris Lattner | a8c3cff | 2003-08-03 18:19:37 +0000 | [diff] [blame] | 24 | def X86InstrInfo : InstrInfo { |
Chris Lattner | 2551080 | 2003-08-04 04:59:56 +0000 | [diff] [blame] | 25 | let PHIInst = PHI; |
Chris Lattner | 59a4a91 | 2003-08-03 21:54:21 +0000 | [diff] [blame] | 26 | |
| 27 | // Define how we want to layout our TargetSpecific information field... This |
| 28 | // should be kept up-to-date with the fields in the X86InstrInfo.h file. |
Chris Lattner | fb2054c | 2003-08-06 15:32:20 +0000 | [diff] [blame] | 29 | let TSFlagsFields = ["FormBits" , "hasOpSizePrefix" , "Prefix", "TypeBits", |
| 30 | "FPFormBits", "printImplicitUses", "Opcode"]; |
| 31 | let TSFlagsShifts = [ 0, 5, 6, 10, |
| 32 | 13, 16, 17]; |
Chris Lattner | a8c3cff | 2003-08-03 18:19:37 +0000 | [diff] [blame] | 33 | } |
| 34 | |
| 35 | def X86 : Target { |
| 36 | // Specify the callee saved registers. |
Chris Lattner | 2551080 | 2003-08-04 04:59:56 +0000 | [diff] [blame] | 37 | let CalleeSavedRegisters = [ESI, EDI, EBX, EBP]; |
Chris Lattner | a8c3cff | 2003-08-03 18:19:37 +0000 | [diff] [blame] | 38 | |
| 39 | // Yes, pointers are 32-bits in size. |
Chris Lattner | 2551080 | 2003-08-04 04:59:56 +0000 | [diff] [blame] | 40 | let PointerType = i32; |
Chris Lattner | a8c3cff | 2003-08-03 18:19:37 +0000 | [diff] [blame] | 41 | |
| 42 | // Information about the instructions... |
Chris Lattner | 2551080 | 2003-08-04 04:59:56 +0000 | [diff] [blame] | 43 | let InstructionSet = X86InstrInfo; |
Chris Lattner | a8c3cff | 2003-08-03 18:19:37 +0000 | [diff] [blame] | 44 | } |