blob: 7dcd6e25ae1f12e788ed4961e91ec9330792c497 [file] [log] [blame]
Simon Pilgrimfc4d4b22016-07-19 13:35:11 +00001; RUN: llc < %s -mtriple=arm64-eabi -aarch64-redzone | FileCheck %s
Tim Northover3b0846e2014-05-24 12:50:23 +00002
Ahmed Bougacha12778332016-12-22 22:27:05 +00003define i64* @store64(i64* %ptr, i64 %index, i64 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +00004; CHECK-LABEL: store64:
5; CHECK: str x{{[0-9+]}}, [x{{[0-9+]}}], #8
6; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +00007 %incdec.ptr = getelementptr inbounds i64, i64* %ptr, i64 1
8 store i64 %spacing, i64* %ptr, align 4
9 ret i64* %incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +000010}
11
Ahmed Bougacha12778332016-12-22 22:27:05 +000012define i64* @store64idxpos256(i64* %ptr, i64 %index, i64 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +000013; CHECK-LABEL: store64idxpos256:
14; CHECK: add x{{[0-9+]}}, x{{[0-9+]}}, #256
15; CHECK: str x{{[0-9+]}}, [x{{[0-9+]}}]
16; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +000017 %incdec.ptr = getelementptr inbounds i64, i64* %ptr, i64 32
18 store i64 %spacing, i64* %ptr, align 4
19 ret i64* %incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +000020}
21
Ahmed Bougacha12778332016-12-22 22:27:05 +000022define i64* @store64idxneg256(i64* %ptr, i64 %index, i64 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +000023; CHECK-LABEL: store64idxneg256:
24; CHECK: str x{{[0-9+]}}, [x{{[0-9+]}}], #-256
25; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +000026 %incdec.ptr = getelementptr inbounds i64, i64* %ptr, i64 -32
27 store i64 %spacing, i64* %ptr, align 4
28 ret i64* %incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +000029}
30
Ahmed Bougacha12778332016-12-22 22:27:05 +000031define i32* @store32(i32* %ptr, i32 %index, i32 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +000032; CHECK-LABEL: store32:
33; CHECK: str w{{[0-9+]}}, [x{{[0-9+]}}], #4
34; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +000035 %incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
36 store i32 %spacing, i32* %ptr, align 4
37 ret i32* %incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +000038}
39
Ahmed Bougacha12778332016-12-22 22:27:05 +000040define i32* @store32idxpos256(i32* %ptr, i32 %index, i32 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +000041; CHECK-LABEL: store32idxpos256:
42; CHECK: add x{{[0-9+]}}, x{{[0-9+]}}, #256
43; CHECK: str w{{[0-9+]}}, [x{{[0-9+]}}]
44; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +000045 %incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 64
46 store i32 %spacing, i32* %ptr, align 4
47 ret i32* %incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +000048}
49
Ahmed Bougacha12778332016-12-22 22:27:05 +000050define i32* @store32idxneg256(i32* %ptr, i32 %index, i32 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +000051; CHECK-LABEL: store32idxneg256:
52; CHECK: str w{{[0-9+]}}, [x{{[0-9+]}}], #-256
53; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +000054 %incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 -64
55 store i32 %spacing, i32* %ptr, align 4
56 ret i32* %incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +000057}
58
Ahmed Bougacha12778332016-12-22 22:27:05 +000059define i16* @store16(i16* %ptr, i16 %index, i16 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +000060; CHECK-LABEL: store16:
61; CHECK: strh w{{[0-9+]}}, [x{{[0-9+]}}], #2
62; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +000063 %incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 1
64 store i16 %spacing, i16* %ptr, align 4
65 ret i16* %incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +000066}
67
Ahmed Bougacha12778332016-12-22 22:27:05 +000068define i16* @store16idxpos256(i16* %ptr, i16 %index, i16 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +000069; CHECK-LABEL: store16idxpos256:
70; CHECK: add x{{[0-9+]}}, x{{[0-9+]}}, #256
71; CHECK: strh w{{[0-9+]}}, [x{{[0-9+]}}]
72; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +000073 %incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 128
74 store i16 %spacing, i16* %ptr, align 4
75 ret i16* %incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +000076}
77
Ahmed Bougacha12778332016-12-22 22:27:05 +000078define i16* @store16idxneg256(i16* %ptr, i16 %index, i16 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +000079; CHECK-LABEL: store16idxneg256:
80; CHECK: strh w{{[0-9+]}}, [x{{[0-9+]}}], #-256
81; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +000082 %incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 -128
83 store i16 %spacing, i16* %ptr, align 4
84 ret i16* %incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +000085}
86
Ahmed Bougacha12778332016-12-22 22:27:05 +000087define i8* @store8(i8* %ptr, i8 %index, i8 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +000088; CHECK-LABEL: store8:
89; CHECK: strb w{{[0-9+]}}, [x{{[0-9+]}}], #1
90; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +000091 %incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
92 store i8 %spacing, i8* %ptr, align 4
93 ret i8* %incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +000094}
95
Ahmed Bougacha12778332016-12-22 22:27:05 +000096define i8* @store8idxpos256(i8* %ptr, i8 %index, i8 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +000097; CHECK-LABEL: store8idxpos256:
98; CHECK: add x{{[0-9+]}}, x{{[0-9+]}}, #256
99; CHECK: strb w{{[0-9+]}}, [x{{[0-9+]}}]
100; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000101 %incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 256
102 store i8 %spacing, i8* %ptr, align 4
103 ret i8* %incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000104}
105
Ahmed Bougacha12778332016-12-22 22:27:05 +0000106define i8* @store8idxneg256(i8* %ptr, i8 %index, i8 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000107; CHECK-LABEL: store8idxneg256:
108; CHECK: strb w{{[0-9+]}}, [x{{[0-9+]}}], #-256
109; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000110 %incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 -256
111 store i8 %spacing, i8* %ptr, align 4
112 ret i8* %incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000113}
114
Ahmed Bougacha12778332016-12-22 22:27:05 +0000115define i32* @truncst64to32(i32* %ptr, i32 %index, i64 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +0000116; CHECK-LABEL: truncst64to32:
117; CHECK: str w{{[0-9+]}}, [x{{[0-9+]}}], #4
118; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000119 %incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
Tim Northover3b0846e2014-05-24 12:50:23 +0000120 %trunc = trunc i64 %spacing to i32
Ahmed Bougacha12778332016-12-22 22:27:05 +0000121 store i32 %trunc, i32* %ptr, align 4
122 ret i32* %incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +0000123}
124
Ahmed Bougacha12778332016-12-22 22:27:05 +0000125define i16* @truncst64to16(i16* %ptr, i16 %index, i64 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +0000126; CHECK-LABEL: truncst64to16:
127; CHECK: strh w{{[0-9+]}}, [x{{[0-9+]}}], #2
128; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000129 %incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 1
Tim Northover3b0846e2014-05-24 12:50:23 +0000130 %trunc = trunc i64 %spacing to i16
Ahmed Bougacha12778332016-12-22 22:27:05 +0000131 store i16 %trunc, i16* %ptr, align 4
132 ret i16* %incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +0000133}
134
Ahmed Bougacha12778332016-12-22 22:27:05 +0000135define i8* @truncst64to8(i8* %ptr, i8 %index, i64 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +0000136; CHECK-LABEL: truncst64to8:
137; CHECK: strb w{{[0-9+]}}, [x{{[0-9+]}}], #1
138; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000139 %incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
Tim Northover3b0846e2014-05-24 12:50:23 +0000140 %trunc = trunc i64 %spacing to i8
Ahmed Bougacha12778332016-12-22 22:27:05 +0000141 store i8 %trunc, i8* %ptr, align 4
142 ret i8* %incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +0000143}
144
145
Ahmed Bougacha12778332016-12-22 22:27:05 +0000146define half* @storef16(half* %ptr, half %index, half %spacing) nounwind {
Ahmed Bougachae0e12db2015-08-04 01:29:38 +0000147; CHECK-LABEL: storef16:
148; CHECK: str h{{[0-9+]}}, [x{{[0-9+]}}], #2
149; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000150 %incdec.ptr = getelementptr inbounds half, half* %ptr, i64 1
151 store half %spacing, half* %ptr, align 2
152 ret half* %incdec.ptr
Ahmed Bougachae0e12db2015-08-04 01:29:38 +0000153}
154
Ahmed Bougacha12778332016-12-22 22:27:05 +0000155define float* @storef32(float* %ptr, float %index, float %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +0000156; CHECK-LABEL: storef32:
157; CHECK: str s{{[0-9+]}}, [x{{[0-9+]}}], #4
158; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000159 %incdec.ptr = getelementptr inbounds float, float* %ptr, i64 1
160 store float %spacing, float* %ptr, align 4
161 ret float* %incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +0000162}
163
Ahmed Bougacha12778332016-12-22 22:27:05 +0000164define double* @storef64(double* %ptr, double %index, double %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +0000165; CHECK-LABEL: storef64:
166; CHECK: str d{{[0-9+]}}, [x{{[0-9+]}}], #8
167; CHECK: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000168 %incdec.ptr = getelementptr inbounds double, double* %ptr, i64 1
Tim Northover3b0846e2014-05-24 12:50:23 +0000169 store double %spacing, double* %ptr, align 4
Ahmed Bougacha12778332016-12-22 22:27:05 +0000170 ret double* %incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +0000171}
172
Ahmed Bougacha12778332016-12-22 22:27:05 +0000173
174define double* @pref64(double* %ptr, double %spacing) {
175; CHECK-LABEL: pref64:
176; CHECK: str d0, [x0, #32]!
177; CHECK-NEXT: ret
178 %incdec.ptr = getelementptr inbounds double, double* %ptr, i64 4
179 store double %spacing, double* %incdec.ptr, align 4
180 ret double *%incdec.ptr
181}
182
183define float* @pref32(float* %ptr, float %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +0000184; CHECK-LABEL: pref32:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000185; CHECK: str s0, [x0, #12]!
Tim Northover3b0846e2014-05-24 12:50:23 +0000186; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000187 %incdec.ptr = getelementptr inbounds float, float* %ptr, i64 3
188 store float %spacing, float* %incdec.ptr, align 4
189 ret float *%incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +0000190}
191
Ahmed Bougacha12778332016-12-22 22:27:05 +0000192define half* @pref16(half* %ptr, half %spacing) nounwind {
Ahmed Bougachae0e12db2015-08-04 01:29:38 +0000193; CHECK-LABEL: pref16:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000194; CHECK: str h0, [x0, #6]!
Ahmed Bougachae0e12db2015-08-04 01:29:38 +0000195; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000196 %incdec.ptr = getelementptr inbounds half, half* %ptr, i64 3
197 store half %spacing, half* %incdec.ptr, align 2
198 ret half *%incdec.ptr
Ahmed Bougachae0e12db2015-08-04 01:29:38 +0000199}
200
Ahmed Bougacha12778332016-12-22 22:27:05 +0000201define i64* @pre64(i64* %ptr, i64 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +0000202; CHECK-LABEL: pre64:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000203; CHECK: str x1, [x0, #16]!
Tim Northover3b0846e2014-05-24 12:50:23 +0000204; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000205 %incdec.ptr = getelementptr inbounds i64, i64* %ptr, i64 2
206 store i64 %spacing, i64* %incdec.ptr, align 4
207 ret i64 *%incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +0000208}
209
Ahmed Bougacha12778332016-12-22 22:27:05 +0000210define i64* @pre64idxpos256(i64* %ptr, i64 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000211; CHECK-LABEL: pre64idxpos256:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000212; CHECK: add x8, x0, #256
213; CHECK-NEXT: str x1, [x0, #256]
214; CHECK-NEXT: mov x0, x8
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000215; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000216 %incdec.ptr = getelementptr inbounds i64, i64* %ptr, i64 32
217 store i64 %spacing, i64* %incdec.ptr, align 4
218 ret i64 *%incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000219}
220
Ahmed Bougacha12778332016-12-22 22:27:05 +0000221define i64* @pre64idxneg256(i64* %ptr, i64 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000222; CHECK-LABEL: pre64idxneg256:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000223; CHECK: str x1, [x0, #-256]!
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000224; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000225 %incdec.ptr = getelementptr inbounds i64, i64* %ptr, i64 -32
226 store i64 %spacing, i64* %incdec.ptr, align 4
227 ret i64 *%incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000228}
229
Ahmed Bougacha12778332016-12-22 22:27:05 +0000230define i32* @pre32(i32* %ptr, i32 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +0000231; CHECK-LABEL: pre32:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000232; CHECK: str w1, [x0, #8]!
Tim Northover3b0846e2014-05-24 12:50:23 +0000233; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000234 %incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 2
235 store i32 %spacing, i32* %incdec.ptr, align 4
236 ret i32 *%incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +0000237}
238
Ahmed Bougacha12778332016-12-22 22:27:05 +0000239define i32* @pre32idxpos256(i32* %ptr, i32 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000240; CHECK-LABEL: pre32idxpos256:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000241; CHECK: add x8, x0, #256
242; CHECK-NEXT: str w1, [x0, #256]
243; CHECK-NEXT: mov x0, x8
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000244; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000245 %incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 64
246 store i32 %spacing, i32* %incdec.ptr, align 4
247 ret i32 *%incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000248}
249
Ahmed Bougacha12778332016-12-22 22:27:05 +0000250define i32* @pre32idxneg256(i32* %ptr, i32 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000251; CHECK-LABEL: pre32idxneg256:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000252; CHECK: str w1, [x0, #-256]!
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000253; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000254 %incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 -64
255 store i32 %spacing, i32* %incdec.ptr, align 4
256 ret i32 *%incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000257}
258
Ahmed Bougacha12778332016-12-22 22:27:05 +0000259define i16* @pre16(i16* %ptr, i16 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +0000260; CHECK-LABEL: pre16:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000261; CHECK: strh w1, [x0, #4]!
Tim Northover3b0846e2014-05-24 12:50:23 +0000262; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000263 %incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 2
264 store i16 %spacing, i16* %incdec.ptr, align 4
265 ret i16 *%incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +0000266}
267
Ahmed Bougacha12778332016-12-22 22:27:05 +0000268define i16* @pre16idxpos256(i16* %ptr, i16 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000269; CHECK-LABEL: pre16idxpos256:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000270; CHECK: add x8, x0, #256
271; CHECK-NEXT: strh w1, [x0, #256]
272; CHECK-NEXT: mov x0, x8
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000273; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000274 %incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 128
275 store i16 %spacing, i16* %incdec.ptr, align 4
276 ret i16 *%incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000277}
278
Ahmed Bougacha12778332016-12-22 22:27:05 +0000279define i16* @pre16idxneg256(i16* %ptr, i16 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000280; CHECK-LABEL: pre16idxneg256:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000281; CHECK: strh w1, [x0, #-256]!
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000282; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000283 %incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 -128
284 store i16 %spacing, i16* %incdec.ptr, align 4
285 ret i16 *%incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000286}
287
Ahmed Bougacha12778332016-12-22 22:27:05 +0000288define i8* @pre8(i8* %ptr, i8 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +0000289; CHECK-LABEL: pre8:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000290; CHECK: strb w1, [x0, #2]!
Tim Northover3b0846e2014-05-24 12:50:23 +0000291; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000292 %incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 2
293 store i8 %spacing, i8* %incdec.ptr, align 4
294 ret i8 *%incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +0000295}
296
Ahmed Bougacha12778332016-12-22 22:27:05 +0000297define i8* @pre8idxpos256(i8* %ptr, i8 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000298; CHECK-LABEL: pre8idxpos256:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000299; CHECK: add x8, x0, #256
300; CHECK-NEXT: strb w1, [x0, #256]
301; CHECK-NEXT: mov x0, x8
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000302; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000303 %incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 256
304 store i8 %spacing, i8* %incdec.ptr, align 4
305 ret i8 *%incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000306}
307
Ahmed Bougacha12778332016-12-22 22:27:05 +0000308define i8* @pre8idxneg256(i8* %ptr, i8 %spacing) {
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000309; CHECK-LABEL: pre8idxneg256:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000310; CHECK: strb w1, [x0, #-256]!
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000311; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000312 %incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 -256
313 store i8 %spacing, i8* %incdec.ptr, align 4
314 ret i8 *%incdec.ptr
Haicheng Wu9ac20a12016-12-22 01:39:24 +0000315}
316
Ahmed Bougacha12778332016-12-22 22:27:05 +0000317define i32* @pretrunc64to32(i32* %ptr, i64 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +0000318; CHECK-LABEL: pretrunc64to32:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000319; CHECK: str w1, [x0, #8]!
Tim Northover3b0846e2014-05-24 12:50:23 +0000320; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000321 %incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 2
Tim Northover3b0846e2014-05-24 12:50:23 +0000322 %trunc = trunc i64 %spacing to i32
Ahmed Bougacha12778332016-12-22 22:27:05 +0000323 store i32 %trunc, i32* %incdec.ptr, align 4
324 ret i32 *%incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +0000325}
326
Ahmed Bougacha12778332016-12-22 22:27:05 +0000327define i16* @pretrunc64to16(i16* %ptr, i64 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +0000328; CHECK-LABEL: pretrunc64to16:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000329; CHECK: strh w1, [x0, #4]!
Tim Northover3b0846e2014-05-24 12:50:23 +0000330; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000331 %incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 2
Tim Northover3b0846e2014-05-24 12:50:23 +0000332 %trunc = trunc i64 %spacing to i16
Ahmed Bougacha12778332016-12-22 22:27:05 +0000333 store i16 %trunc, i16* %incdec.ptr, align 4
334 ret i16 *%incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +0000335}
336
Ahmed Bougacha12778332016-12-22 22:27:05 +0000337define i8* @pretrunc64to8(i8* %ptr, i64 %spacing) {
Tim Northover3b0846e2014-05-24 12:50:23 +0000338; CHECK-LABEL: pretrunc64to8:
Ahmed Bougacha12778332016-12-22 22:27:05 +0000339; CHECK: strb w1, [x0, #2]!
Tim Northover3b0846e2014-05-24 12:50:23 +0000340; CHECK-NEXT: ret
Ahmed Bougacha12778332016-12-22 22:27:05 +0000341 %incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 2
Tim Northover3b0846e2014-05-24 12:50:23 +0000342 %trunc = trunc i64 %spacing to i8
Ahmed Bougacha12778332016-12-22 22:27:05 +0000343 store i8 %trunc, i8* %incdec.ptr, align 4
344 ret i8 *%incdec.ptr
Tim Northover3b0846e2014-05-24 12:50:23 +0000345}
346
347;-----
348; Pre-indexed loads
349;-----
350define double* @preidxf64(double* %src, double* %out) {
351; CHECK-LABEL: preidxf64:
352; CHECK: ldr d0, [x0, #8]!
353; CHECK: str d0, [x1]
354; CHECK: ret
David Blaikie79e6c742015-02-27 19:29:02 +0000355 %ptr = getelementptr inbounds double, double* %src, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +0000356 %tmp = load double, double* %ptr, align 4
Tim Northover3b0846e2014-05-24 12:50:23 +0000357 store double %tmp, double* %out, align 4
358 ret double* %ptr
359}
360
361define float* @preidxf32(float* %src, float* %out) {
362; CHECK-LABEL: preidxf32:
363; CHECK: ldr s0, [x0, #4]!
364; CHECK: str s0, [x1]
365; CHECK: ret
David Blaikie79e6c742015-02-27 19:29:02 +0000366 %ptr = getelementptr inbounds float, float* %src, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +0000367 %tmp = load float, float* %ptr, align 4
Tim Northover3b0846e2014-05-24 12:50:23 +0000368 store float %tmp, float* %out, align 4
369 ret float* %ptr
370}
371
Ahmed Bougachae0e12db2015-08-04 01:29:38 +0000372define half* @preidxf16(half* %src, half* %out) {
373; CHECK-LABEL: preidxf16:
374; CHECK: ldr h0, [x0, #2]!
375; CHECK: str h0, [x1]
376; CHECK: ret
377 %ptr = getelementptr inbounds half, half* %src, i64 1
378 %tmp = load half, half* %ptr, align 2
379 store half %tmp, half* %out, align 2
380 ret half* %ptr
381}
382
Tim Northover3b0846e2014-05-24 12:50:23 +0000383define i64* @preidx64(i64* %src, i64* %out) {
384; CHECK-LABEL: preidx64:
385; CHECK: ldr x[[REG:[0-9]+]], [x0, #8]!
386; CHECK: str x[[REG]], [x1]
387; CHECK: ret
David Blaikie79e6c742015-02-27 19:29:02 +0000388 %ptr = getelementptr inbounds i64, i64* %src, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +0000389 %tmp = load i64, i64* %ptr, align 4
Tim Northover3b0846e2014-05-24 12:50:23 +0000390 store i64 %tmp, i64* %out, align 4
391 ret i64* %ptr
392}
393
394define i32* @preidx32(i32* %src, i32* %out) {
395; CHECK: ldr w[[REG:[0-9]+]], [x0, #4]!
396; CHECK: str w[[REG]], [x1]
397; CHECK: ret
David Blaikie79e6c742015-02-27 19:29:02 +0000398 %ptr = getelementptr inbounds i32, i32* %src, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +0000399 %tmp = load i32, i32* %ptr, align 4
Tim Northover3b0846e2014-05-24 12:50:23 +0000400 store i32 %tmp, i32* %out, align 4
401 ret i32* %ptr
402}
403
404define i16* @preidx16zext32(i16* %src, i32* %out) {
405; CHECK: ldrh w[[REG:[0-9]+]], [x0, #2]!
406; CHECK: str w[[REG]], [x1]
407; CHECK: ret
David Blaikie79e6c742015-02-27 19:29:02 +0000408 %ptr = getelementptr inbounds i16, i16* %src, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +0000409 %tmp = load i16, i16* %ptr, align 4
Tim Northover3b0846e2014-05-24 12:50:23 +0000410 %ext = zext i16 %tmp to i32
411 store i32 %ext, i32* %out, align 4
412 ret i16* %ptr
413}
414
415define i16* @preidx16zext64(i16* %src, i64* %out) {
416; CHECK: ldrh w[[REG:[0-9]+]], [x0, #2]!
417; CHECK: str x[[REG]], [x1]
418; CHECK: ret
David Blaikie79e6c742015-02-27 19:29:02 +0000419 %ptr = getelementptr inbounds i16, i16* %src, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +0000420 %tmp = load i16, i16* %ptr, align 4
Tim Northover3b0846e2014-05-24 12:50:23 +0000421 %ext = zext i16 %tmp to i64
422 store i64 %ext, i64* %out, align 4
423 ret i16* %ptr
424}
425
426define i8* @preidx8zext32(i8* %src, i32* %out) {
427; CHECK: ldrb w[[REG:[0-9]+]], [x0, #1]!
428; CHECK: str w[[REG]], [x1]
429; CHECK: ret
David Blaikie79e6c742015-02-27 19:29:02 +0000430 %ptr = getelementptr inbounds i8, i8* %src, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +0000431 %tmp = load i8, i8* %ptr, align 4
Tim Northover3b0846e2014-05-24 12:50:23 +0000432 %ext = zext i8 %tmp to i32
433 store i32 %ext, i32* %out, align 4
434 ret i8* %ptr
435}
436
437define i8* @preidx8zext64(i8* %src, i64* %out) {
438; CHECK: ldrb w[[REG:[0-9]+]], [x0, #1]!
439; CHECK: str x[[REG]], [x1]
440; CHECK: ret
David Blaikie79e6c742015-02-27 19:29:02 +0000441 %ptr = getelementptr inbounds i8, i8* %src, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +0000442 %tmp = load i8, i8* %ptr, align 4
Tim Northover3b0846e2014-05-24 12:50:23 +0000443 %ext = zext i8 %tmp to i64
444 store i64 %ext, i64* %out, align 4
445 ret i8* %ptr
446}
447
448define i32* @preidx32sext64(i32* %src, i64* %out) {
449; CHECK: ldrsw x[[REG:[0-9]+]], [x0, #4]!
450; CHECK: str x[[REG]], [x1]
451; CHECK: ret
David Blaikie79e6c742015-02-27 19:29:02 +0000452 %ptr = getelementptr inbounds i32, i32* %src, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +0000453 %tmp = load i32, i32* %ptr, align 4
Tim Northover3b0846e2014-05-24 12:50:23 +0000454 %ext = sext i32 %tmp to i64
455 store i64 %ext, i64* %out, align 8
456 ret i32* %ptr
457}
458
459define i16* @preidx16sext32(i16* %src, i32* %out) {
460; CHECK: ldrsh w[[REG:[0-9]+]], [x0, #2]!
461; CHECK: str w[[REG]], [x1]
462; CHECK: ret
David Blaikie79e6c742015-02-27 19:29:02 +0000463 %ptr = getelementptr inbounds i16, i16* %src, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +0000464 %tmp = load i16, i16* %ptr, align 4
Tim Northover3b0846e2014-05-24 12:50:23 +0000465 %ext = sext i16 %tmp to i32
466 store i32 %ext, i32* %out, align 4
467 ret i16* %ptr
468}
469
470define i16* @preidx16sext64(i16* %src, i64* %out) {
471; CHECK: ldrsh x[[REG:[0-9]+]], [x0, #2]!
472; CHECK: str x[[REG]], [x1]
473; CHECK: ret
David Blaikie79e6c742015-02-27 19:29:02 +0000474 %ptr = getelementptr inbounds i16, i16* %src, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +0000475 %tmp = load i16, i16* %ptr, align 4
Tim Northover3b0846e2014-05-24 12:50:23 +0000476 %ext = sext i16 %tmp to i64
477 store i64 %ext, i64* %out, align 4
478 ret i16* %ptr
479}
480
481define i8* @preidx8sext32(i8* %src, i32* %out) {
482; CHECK: ldrsb w[[REG:[0-9]+]], [x0, #1]!
483; CHECK: str w[[REG]], [x1]
484; CHECK: ret
David Blaikie79e6c742015-02-27 19:29:02 +0000485 %ptr = getelementptr inbounds i8, i8* %src, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +0000486 %tmp = load i8, i8* %ptr, align 4
Tim Northover3b0846e2014-05-24 12:50:23 +0000487 %ext = sext i8 %tmp to i32
488 store i32 %ext, i32* %out, align 4
489 ret i8* %ptr
490}
491
492define i8* @preidx8sext64(i8* %src, i64* %out) {
493; CHECK: ldrsb x[[REG:[0-9]+]], [x0, #1]!
494; CHECK: str x[[REG]], [x1]
495; CHECK: ret
David Blaikie79e6c742015-02-27 19:29:02 +0000496 %ptr = getelementptr inbounds i8, i8* %src, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +0000497 %tmp = load i8, i8* %ptr, align 4
Tim Northover3b0846e2014-05-24 12:50:23 +0000498 %ext = sext i8 %tmp to i64
499 store i64 %ext, i64* %out, align 4
500 ret i8* %ptr
501}
Quentin Colombetc64c1752014-08-11 21:39:53 +0000502
503; This test checks if illegal post-index is generated
504
505define i64* @postidx_clobber(i64* %addr) nounwind noinline ssp {
506; CHECK-LABEL: postidx_clobber:
507; CHECK-NOT: str x0, [x0], #8
508; ret
509 %paddr = bitcast i64* %addr to i64**
510 store i64* %addr, i64** %paddr
David Blaikie79e6c742015-02-27 19:29:02 +0000511 %newaddr = getelementptr i64, i64* %addr, i32 1
Quentin Colombetc64c1752014-08-11 21:39:53 +0000512 ret i64* %newaddr
513}