| Ties Stuij | 9c16d80 | 2018-08-30 12:52:35 +0000 | [diff] [blame] | 1 | ; RUN: llc <%s -mtriple=arm-none-eabi 2>&1 | FileCheck %s -check-prefix=CHECK |
| 2 | |
| 3 | ; RUN: llc <%s -mtriple=arm-none-eabi -relocation-model=rwpi 2>&1 \ |
| 4 | ; RUN: | FileCheck %s -check-prefix=RWPI |
| 5 | |
| Francis Visoiu Mistrih | b7cef81 | 2019-01-14 10:55:55 +0000 | [diff] [blame] | 6 | ; RUN: llc <%s -mtriple=arm-none-eabi --frame-pointer=all 2>&1 \ |
| Ties Stuij | 9c16d80 | 2018-08-30 12:52:35 +0000 | [diff] [blame] | 7 | ; RUN: | FileCheck %s -check-prefix=NO_FP_ELIM |
| 8 | |
| 9 | ; CHECK: warning: inline asm clobber list contains reserved registers: SP, PC |
| 10 | ; CHECK: warning: inline asm clobber list contains reserved registers: R11 |
| 11 | ; RWPI: warning: inline asm clobber list contains reserved registers: R9, SP, PC |
| 12 | ; RWPI: warning: inline asm clobber list contains reserved registers: R11 |
| 13 | ; NO_FP_ELIM: warning: inline asm clobber list contains reserved registers: R11, SP, PC |
| 14 | ; NO_FP_ELIM: warning: inline asm clobber list contains reserved registers: R11 |
| 15 | |
| 16 | define void @foo() nounwind { |
| 17 | call void asm sideeffect "mov r7, #1", |
| 18 | "~{r9},~{r11},~{r12},~{lr},~{sp},~{pc},~{r10}"() |
| 19 | ret void |
| 20 | } |
| 21 | |
| 22 | define i32 @bar(i32 %i) { |
| 23 | %vla = alloca i32, i32 %i, align 4 |
| 24 | tail call void asm sideeffect "mov r7, #1", "~{r11}"() |
| 25 | %1 = load volatile i32, i32* %vla, align 4 |
| 26 | ret i32 %1 |
| 27 | } |