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gerrit-public.fairphone.software / toolchain / llvm-project / 2fc5a786beaba1fbac1de65d78889d72b667f2d3 / . / llvm / test / CodeGen / Mips / seleq.ll
blob: 7d1e034d68c7c1ad1e63df4dc611ea2769948e28 [file] [log] [blame]
Daniel Sanders8008de52015-10-15 14:34:23 +0000[diff] [blame]1; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=16
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]2
3@t = global i32 10, align 4
4@f = global i32 199, align 4
5@a = global i32 1, align 4
6@b = global i32 10, align 4
7@c = global i32 1, align 4
8@z1 = common global i32 0, align 4
9@z2 = common global i32 0, align 4
10@z3 = common global i32 0, align 4
11@z4 = common global i32 0, align 4
12
Eric Christophera9353d12014-09-26 01:44:08 +0000[diff] [blame]13define void @calc_seleq() nounwind {
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]14entry:
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]15 %0 = load i32, i32* @a, align 4
16 %1 = load i32, i32* @b, align 4
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]17 %cmp = icmp eq i32 %0, %1
18 br i1 %cmp, label %cond.true, label %cond.false
19
20cond.true: ; preds = %entry
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]21 %2 = load i32, i32* @f, align 4
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]22 br label %cond.end
23
24cond.false: ; preds = %entry
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]25 %3 = load i32, i32* @t, align 4
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]26 br label %cond.end
27
28cond.end: ; preds = %cond.false, %cond.true
29 %cond = phi i32 [ %2, %cond.true ], [ %3, %cond.false ]
30 store i32 %cond, i32* @z1, align 4
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]31 %4 = load i32, i32* @b, align 4
32 %5 = load i32, i32* @a, align 4
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]33 %cmp1 = icmp eq i32 %4, %5
34 br i1 %cmp1, label %cond.true2, label %cond.false3
35
36cond.true2: ; preds = %cond.end
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]37 %6 = load i32, i32* @f, align 4
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]38 br label %cond.end4
39
40cond.false3: ; preds = %cond.end
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]41 %7 = load i32, i32* @t, align 4
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]42 br label %cond.end4
43
44cond.end4: ; preds = %cond.false3, %cond.true2
45 %cond5 = phi i32 [ %6, %cond.true2 ], [ %7, %cond.false3 ]
46 store i32 %cond5, i32* @z2, align 4
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]47 %8 = load i32, i32* @c, align 4
48 %9 = load i32, i32* @a, align 4
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]49 %cmp6 = icmp eq i32 %8, %9
50 br i1 %cmp6, label %cond.true7, label %cond.false8
51
52cond.true7: ; preds = %cond.end4
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]53 %10 = load i32, i32* @t, align 4
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]54 br label %cond.end9
55
56cond.false8: ; preds = %cond.end4
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]57 %11 = load i32, i32* @f, align 4
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]58 br label %cond.end9
59
60cond.end9: ; preds = %cond.false8, %cond.true7
61 %cond10 = phi i32 [ %10, %cond.true7 ], [ %11, %cond.false8 ]
62 store i32 %cond10, i32* @z3, align 4
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]63 %12 = load i32, i32* @a, align 4
64 %13 = load i32, i32* @c, align 4
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]65 %cmp11 = icmp eq i32 %12, %13
66 br i1 %cmp11, label %cond.true12, label %cond.false13
67
68cond.true12: ; preds = %cond.end9
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]69 %14 = load i32, i32* @t, align 4
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]70 br label %cond.end14
71
72cond.false13: ; preds = %cond.end9
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]73 %15 = load i32, i32* @f, align 4
Reed Kotlercb374092013-02-18 00:59:04 +0000[diff] [blame]74 br label %cond.end14
75
76cond.end14: ; preds = %cond.false13, %cond.true12
77 %cond15 = phi i32 [ %14, %cond.true12 ], [ %15, %cond.false13 ]
78 store i32 %cond15, i32* @z4, align 4
79 ret void
80}
81
82attributes #0 = { nounwind "target-cpu"="mips32" "target-features"="+o32,+mips32" }
83
84; 16: cmp ${{[0-9]+}}, ${{[0-9]+}}
85; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}
86
87; 16: cmp ${{[0-9]+}}, ${{[0-9]+}}
88; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}
89
90; 16: cmp ${{[0-9]+}}, ${{[0-9]+}}
91; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}
92
93; 16: cmp ${{[0-9]+}}, ${{[0-9]+}}
94; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}
95