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gerrit-public.fairphone.software / toolchain / llvm-project / 2fc5a786beaba1fbac1de65d78889d72b667f2d3 / . / llvm / test / Transforms / SimplifyCFG / AMDGPU / cttz-ctlz.ll
blob: dfefff90877e7a79dbe477f60022d403adcbf258 [file] [log] [blame]
Eric Christophercee313d2019-04-17 04:52:47 +0000[diff] [blame]1; RUN: opt -S -simplifycfg -mtriple=amdgcn-unknown-unknown -mcpu=tahiti < %s | FileCheck -check-prefix=SI -check-prefix=ALL %s
2; RUN: opt -S -simplifycfg -mtriple=amdgcn-unknown-unknown -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=ALL %s
3
4
5define i64 @test1(i64 %A) {
6; ALL-LABEL: @test1(
7; SI: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i64 %A, 0
8; SI-NEXT: [[CTLZ:%[A-Za-z0-9]+]] = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true)
9; SI-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i64 64, i64 [[CTLZ]]
10; SI-NEXT: ret i64 [[SEL]]
11entry:
12 %tobool = icmp eq i64 %A, 0
13 br i1 %tobool, label %cond.end, label %cond.true
14
15cond.true: ; preds = %entry
16 %0 = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true)
17 br label %cond.end
18
19cond.end: ; preds = %entry, %cond.true
20 %cond = phi i64 [ %0, %cond.true ], [ 64, %entry ]
21 ret i64 %cond
22}
23
24
25define i32 @test2(i32 %A) {
26; ALL-LABEL: @test2(
27; SI: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
28; SI-NEXT: [[CTLZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
29; SI-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTLZ]]
30; SI-NEXT: ret i32 [[SEL]]
31entry:
32 %tobool = icmp eq i32 %A, 0
33 br i1 %tobool, label %cond.end, label %cond.true
34
35cond.true: ; preds = %entry
36 %0 = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
37 br label %cond.end
38
39cond.end: ; preds = %entry, %cond.true
40 %cond = phi i32 [ %0, %cond.true ], [ 32, %entry ]
41 ret i32 %cond
42}
43
44
45define signext i16 @test3(i16 signext %A) {
46; ALL-LABEL: @test3(
47; SI: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i16 %A, 0
48; SI-NEXT: [[CTLZ:%[A-Za-z0-9]+]] = tail call i16 @llvm.ctlz.i16(i16 %A, i1 true)
49; SI-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i16 16, i16 [[CTLZ]]
50; SI-NEXT: ret i16 [[SEL]]
51entry:
52 %tobool = icmp eq i16 %A, 0
53 br i1 %tobool, label %cond.end, label %cond.true
54
55cond.true: ; preds = %entry
56 %0 = tail call i16 @llvm.ctlz.i16(i16 %A, i1 true)
57 br label %cond.end
58
59cond.end: ; preds = %entry, %cond.true
60 %cond = phi i16 [ %0, %cond.true ], [ 16, %entry ]
61 ret i16 %cond
62}
63
64
65define i64 @test1b(i64 %A) {
66; ALL-LABEL: @test1b(
67; SI: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i64 %A, 0
68; SI-NEXT: [[CTTZ:%[A-Za-z0-9]+]] = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)
69; SI-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i64 64, i64 [[CTTZ]]
70; SI-NEXT: ret i64 [[SEL]]
71entry:
72 %tobool = icmp eq i64 %A, 0
73 br i1 %tobool, label %cond.end, label %cond.true
74
75cond.true: ; preds = %entry
76 %0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)
77 br label %cond.end
78
79cond.end: ; preds = %entry, %cond.true
80 %cond = phi i64 [ %0, %cond.true ], [ 64, %entry ]
81 ret i64 %cond
82}
83
84
85define i32 @test2b(i32 %A) {
86; ALL-LABEL: @test2b(
87; SI: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
88; SI-NEXT: [[CTTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
89; SI-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTTZ]]
90; SI-NEXT: ret i32 [[SEL]]
91entry:
92 %tobool = icmp eq i32 %A, 0
93 br i1 %tobool, label %cond.end, label %cond.true
94
95cond.true: ; preds = %entry
96 %0 = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
97 br label %cond.end
98
99cond.end: ; preds = %entry, %cond.true
100 %cond = phi i32 [ %0, %cond.true ], [ 32, %entry ]
101 ret i32 %cond
102}
103
104
105define signext i16 @test3b(i16 signext %A) {
106; ALL-LABEL: @test3b(
107; SI: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i16 %A, 0
108; SI-NEXT: [[CTTZ:%[A-Za-z0-9]+]] = tail call i16 @llvm.cttz.i16(i16 %A, i1 true)
109; SI-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i16 16, i16 [[CTTZ]]
110; SI-NEXT: ret i16 [[SEL]]
111entry:
112 %tobool = icmp eq i16 %A, 0
113 br i1 %tobool, label %cond.end, label %cond.true
114
115cond.true: ; preds = %entry
116 %0 = tail call i16 @llvm.cttz.i16(i16 %A, i1 true)
117 br label %cond.end
118
119cond.end: ; preds = %entry, %cond.true
120 %cond = phi i16 [ %0, %cond.true ], [ 16, %entry ]
121 ret i16 %cond
122}
123
124
125define i64 @test1c(i64 %A) {
126; ALL-LABEL: @test1c(
127; ALL: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i64 %A, 0
128; ALL-NEXT: [[CTLZ:%[A-Za-z0-9]+]] = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true)
129; ALL-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i64 63, i64 [[CTLZ]]
130; ALL-NEXT: ret i64 [[SEL]]
131entry:
132 %tobool = icmp eq i64 %A, 0
133 br i1 %tobool, label %cond.end, label %cond.true
134
135cond.true: ; preds = %entry
136 %0 = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true)
137 br label %cond.end
138
139cond.end: ; preds = %entry, %cond.true
140 %cond = phi i64 [ %0, %cond.true ], [ 63, %entry ]
141 ret i64 %cond
142}
143
144define i32 @test2c(i32 %A) {
145; ALL-LABEL: @test2c(
146; ALL: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
147; ALL-NEXT: [[CTLZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
148; ALL-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 31, i32 [[CTLZ]]
149; ALL-NEXT: ret i32 [[SEL]]
150entry:
151 %tobool = icmp eq i32 %A, 0
152 br i1 %tobool, label %cond.end, label %cond.true
153
154cond.true: ; preds = %entry
155 %0 = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
156 br label %cond.end
157
158cond.end: ; preds = %entry, %cond.true
159 %cond = phi i32 [ %0, %cond.true ], [ 31, %entry ]
160 ret i32 %cond
161}
162
163
164define signext i16 @test3c(i16 signext %A) {
165; ALL-LABEL: @test3c(
166; ALL: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i16 %A, 0
167; ALL-NEXT: [[CTLZ:%[A-Za-z0-9]+]] = tail call i16 @llvm.ctlz.i16(i16 %A, i1 true)
168; ALL-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i16 15, i16 [[CTLZ]]
169; ALL-NEXT: ret i16 [[SEL]]
170entry:
171 %tobool = icmp eq i16 %A, 0
172 br i1 %tobool, label %cond.end, label %cond.true
173
174cond.true: ; preds = %entry
175 %0 = tail call i16 @llvm.ctlz.i16(i16 %A, i1 true)
176 br label %cond.end
177
178cond.end: ; preds = %entry, %cond.true
179 %cond = phi i16 [ %0, %cond.true ], [ 15, %entry ]
180 ret i16 %cond
181}
182
183
184define i64 @test1d(i64 %A) {
185; ALL-LABEL: @test1d(
186; ALL: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i64 %A, 0
187; ALL-NEXT: [[CTTZ:%[A-Za-z0-9]+]] = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)
188; ALL-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i64 63, i64 [[CTTZ]]
189; ALL-NEXT: ret i64 [[SEL]]
190entry:
191 %tobool = icmp eq i64 %A, 0
192 br i1 %tobool, label %cond.end, label %cond.true
193
194cond.true: ; preds = %entry
195 %0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)
196 br label %cond.end
197
198cond.end: ; preds = %entry, %cond.true
199 %cond = phi i64 [ %0, %cond.true ], [ 63, %entry ]
200 ret i64 %cond
201}
202
203
204define i32 @test2d(i32 %A) {
205; ALL-LABEL: @test2d(
206; ALL: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
207; ALL-NEXT: [[CTTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
208; ALL-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 31, i32 [[CTTZ]]
209; ALL-NEXT: ret i32 [[SEL]]
210entry:
211 %tobool = icmp eq i32 %A, 0
212 br i1 %tobool, label %cond.end, label %cond.true
213
214cond.true: ; preds = %entry
215 %0 = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
216 br label %cond.end
217
218cond.end: ; preds = %entry, %cond.true
219 %cond = phi i32 [ %0, %cond.true ], [ 31, %entry ]
220 ret i32 %cond
221}
222
223
224define signext i16 @test3d(i16 signext %A) {
225; ALL-LABEL: @test3d(
226; ALL: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i16 %A, 0
227; ALL-NEXT: [[CTTZ:%[A-Za-z0-9]+]] = tail call i16 @llvm.cttz.i16(i16 %A, i1 true)
228; ALL-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i16 15, i16 [[CTTZ]]
229; ALL-NEXT: ret i16 [[SEL]]
230entry:
231 %tobool = icmp eq i16 %A, 0
232 br i1 %tobool, label %cond.end, label %cond.true
233
234cond.true: ; preds = %entry
235 %0 = tail call i16 @llvm.cttz.i16(i16 %A, i1 true)
236 br label %cond.end
237
238cond.end: ; preds = %entry, %cond.true
239 %cond = phi i16 [ %0, %cond.true ], [ 15, %entry ]
240 ret i16 %cond
241}
242
243
244declare i64 @llvm.ctlz.i64(i64, i1)
245declare i32 @llvm.ctlz.i32(i32, i1)
246declare i16 @llvm.ctlz.i16(i16, i1)
247declare i64 @llvm.cttz.i64(i64, i1)
248declare i32 @llvm.cttz.i32(i32, i1)
249declare i16 @llvm.cttz.i16(i16, i1)