blob: c6959d72961d163f8708d2a3541d31d4247071f3 [file] [log] [blame]
Sanjay Patela4b052c2016-06-19 21:40:12 +00001; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
Duncan Sandsba286d72011-10-26 20:55:21 +00002; RUN: opt < %s -instsimplify -S | FileCheck %s
3
4define i64 @pow2(i32 %x) {
Stephen Linc1c7a132013-07-14 01:42:54 +00005; CHECK-LABEL: @pow2(
Sanjay Patela4b052c2016-06-19 21:40:12 +00006; CHECK-NEXT: [[NEGX:%.*]] = sub i32 0, %x
Sanjay Patel69632442016-03-25 20:12:25 +00007; CHECK-NEXT: [[X2:%.*]] = and i32 %x, [[NEGX]]
8; CHECK-NEXT: [[E:%.*]] = zext i32 [[X2]] to i64
9; CHECK-NEXT: ret i64 [[E]]
10;
Duncan Sandsba286d72011-10-26 20:55:21 +000011 %negx = sub i32 0, %x
12 %x2 = and i32 %x, %negx
13 %e = zext i32 %x2 to i64
14 %nege = sub i64 0, %e
15 %e2 = and i64 %e, %nege
16 ret i64 %e2
Duncan Sandsba286d72011-10-26 20:55:21 +000017}
Duncan Sands985ba632011-10-28 18:30:05 +000018
19define i64 @pow2b(i32 %x) {
Stephen Linc1c7a132013-07-14 01:42:54 +000020; CHECK-LABEL: @pow2b(
Sanjay Patela4b052c2016-06-19 21:40:12 +000021; CHECK-NEXT: [[SH:%.*]] = shl i32 2, %x
Sanjay Patel69632442016-03-25 20:12:25 +000022; CHECK-NEXT: [[E:%.*]] = zext i32 [[SH]] to i64
23; CHECK-NEXT: ret i64 [[E]]
24;
Duncan Sands985ba632011-10-28 18:30:05 +000025 %sh = shl i32 2, %x
26 %e = zext i32 %sh to i64
27 %nege = sub i64 0, %e
28 %e2 = and i64 %e, %nege
29 ret i64 %e2
Duncan Sands985ba632011-10-28 18:30:05 +000030}
David Majnemercd4fbcd2014-07-31 04:49:18 +000031
David Majnemera315bd82014-09-15 08:15:28 +000032define i1 @and_of_icmps0(i32 %b) {
33; CHECK-LABEL: @and_of_icmps0(
Sanjay Patela4b052c2016-06-19 21:40:12 +000034; CHECK-NEXT: ret i1 false
Sanjay Patel69632442016-03-25 20:12:25 +000035;
David Majnemera315bd82014-09-15 08:15:28 +000036 %1 = add i32 %b, 2
37 %2 = icmp ult i32 %1, 4
38 %cmp3 = icmp sgt i32 %b, 2
39 %cmp = and i1 %2, %cmp3
40 ret i1 %cmp
David Majnemera315bd82014-09-15 08:15:28 +000041}
42
Sanjay Patel1b312ad2016-09-28 13:53:13 +000043define <2 x i1> @and_of_icmps0_vec(<2 x i32> %b) {
44; CHECK-LABEL: @and_of_icmps0_vec(
45; CHECK-NEXT: ret <2 x i1> zeroinitializer
46;
47 %1 = add <2 x i32> %b, <i32 2, i32 2>
48 %2 = icmp ult <2 x i32> %1, <i32 4, i32 4>
49 %cmp3 = icmp sgt <2 x i32> %b, <i32 2, i32 2>
50 %cmp = and <2 x i1> %2, %cmp3
51 ret <2 x i1> %cmp
52}
53
David Majnemera315bd82014-09-15 08:15:28 +000054define i1 @and_of_icmps1(i32 %b) {
55; CHECK-LABEL: @and_of_icmps1(
Sanjay Patela4b052c2016-06-19 21:40:12 +000056; CHECK-NEXT: ret i1 false
Sanjay Patel69632442016-03-25 20:12:25 +000057;
David Majnemera315bd82014-09-15 08:15:28 +000058 %1 = add nsw i32 %b, 2
59 %2 = icmp slt i32 %1, 4
60 %cmp3 = icmp sgt i32 %b, 2
61 %cmp = and i1 %2, %cmp3
62 ret i1 %cmp
David Majnemera315bd82014-09-15 08:15:28 +000063}
64
Sanjay Patel1b312ad2016-09-28 13:53:13 +000065define <2 x i1> @and_of_icmps1_vec(<2 x i32> %b) {
66; CHECK-LABEL: @and_of_icmps1_vec(
67; CHECK-NEXT: ret <2 x i1> zeroinitializer
68;
69 %1 = add nsw <2 x i32> %b, <i32 2, i32 2>
70 %2 = icmp slt <2 x i32> %1, <i32 4, i32 4>
71 %cmp3 = icmp sgt <2 x i32> %b, <i32 2, i32 2>
72 %cmp = and <2 x i1> %2, %cmp3
73 ret <2 x i1> %cmp
74}
75
David Majnemera315bd82014-09-15 08:15:28 +000076define i1 @and_of_icmps2(i32 %b) {
77; CHECK-LABEL: @and_of_icmps2(
Sanjay Patela4b052c2016-06-19 21:40:12 +000078; CHECK-NEXT: ret i1 false
Sanjay Patel69632442016-03-25 20:12:25 +000079;
David Majnemera315bd82014-09-15 08:15:28 +000080 %1 = add i32 %b, 2
81 %2 = icmp ule i32 %1, 3
82 %cmp3 = icmp sgt i32 %b, 2
83 %cmp = and i1 %2, %cmp3
84 ret i1 %cmp
David Majnemera315bd82014-09-15 08:15:28 +000085}
86
Sanjay Patel1b312ad2016-09-28 13:53:13 +000087define <2 x i1> @and_of_icmps2_vec(<2 x i32> %b) {
88; CHECK-LABEL: @and_of_icmps2_vec(
89; CHECK-NEXT: ret <2 x i1> zeroinitializer
90;
91 %1 = add <2 x i32> %b, <i32 2, i32 2>
92 %2 = icmp ule <2 x i32> %1, <i32 3, i32 3>
93 %cmp3 = icmp sgt <2 x i32> %b, <i32 2, i32 2>
94 %cmp = and <2 x i1> %2, %cmp3
95 ret <2 x i1> %cmp
96}
97
David Majnemera315bd82014-09-15 08:15:28 +000098define i1 @and_of_icmps3(i32 %b) {
99; CHECK-LABEL: @and_of_icmps3(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000100; CHECK-NEXT: ret i1 false
Sanjay Patel69632442016-03-25 20:12:25 +0000101;
David Majnemera315bd82014-09-15 08:15:28 +0000102 %1 = add nsw i32 %b, 2
103 %2 = icmp sle i32 %1, 3
104 %cmp3 = icmp sgt i32 %b, 2
105 %cmp = and i1 %2, %cmp3
106 ret i1 %cmp
David Majnemera315bd82014-09-15 08:15:28 +0000107}
108
Sanjay Patel1b312ad2016-09-28 13:53:13 +0000109define <2 x i1> @and_of_icmps3_vec(<2 x i32> %b) {
110; CHECK-LABEL: @and_of_icmps3_vec(
111; CHECK-NEXT: ret <2 x i1> zeroinitializer
112;
113 %1 = add nsw <2 x i32> %b, <i32 2, i32 2>
114 %2 = icmp sle <2 x i32> %1, <i32 3, i32 3>
115 %cmp3 = icmp sgt <2 x i32> %b, <i32 2, i32 2>
116 %cmp = and <2 x i1> %2, %cmp3
117 ret <2 x i1> %cmp
118}
119
David Majnemera315bd82014-09-15 08:15:28 +0000120define i1 @and_of_icmps4(i32 %b) {
121; CHECK-LABEL: @and_of_icmps4(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000122; CHECK-NEXT: ret i1 false
Sanjay Patel69632442016-03-25 20:12:25 +0000123;
David Majnemera315bd82014-09-15 08:15:28 +0000124 %1 = add nuw i32 %b, 2
125 %2 = icmp ult i32 %1, 4
126 %cmp3 = icmp ugt i32 %b, 2
127 %cmp = and i1 %2, %cmp3
128 ret i1 %cmp
David Majnemera315bd82014-09-15 08:15:28 +0000129}
130
Sanjay Patel1b312ad2016-09-28 13:53:13 +0000131define <2 x i1> @and_of_icmps4_vec(<2 x i32> %b) {
132; CHECK-LABEL: @and_of_icmps4_vec(
133; CHECK-NEXT: ret <2 x i1> zeroinitializer
134;
135 %1 = add nuw <2 x i32> %b, <i32 2, i32 2>
136 %2 = icmp ult <2 x i32> %1, <i32 4, i32 4>
137 %cmp3 = icmp ugt <2 x i32> %b, <i32 2, i32 2>
138 %cmp = and <2 x i1> %2, %cmp3
139 ret <2 x i1> %cmp
140}
141
David Majnemera315bd82014-09-15 08:15:28 +0000142define i1 @and_of_icmps5(i32 %b) {
143; CHECK-LABEL: @and_of_icmps5(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000144; CHECK-NEXT: ret i1 false
Sanjay Patel69632442016-03-25 20:12:25 +0000145;
David Majnemera315bd82014-09-15 08:15:28 +0000146 %1 = add nuw i32 %b, 2
147 %2 = icmp ule i32 %1, 3
148 %cmp3 = icmp ugt i32 %b, 2
149 %cmp = and i1 %2, %cmp3
150 ret i1 %cmp
David Majnemera315bd82014-09-15 08:15:28 +0000151}
152
Sanjay Patel1b312ad2016-09-28 13:53:13 +0000153define <2 x i1> @and_of_icmps5_vec(<2 x i32> %b) {
154; CHECK-LABEL: @and_of_icmps5_vec(
155; CHECK-NEXT: ret <2 x i1> zeroinitializer
156;
157 %1 = add nuw <2 x i32> %b, <i32 2, i32 2>
158 %2 = icmp ule <2 x i32> %1, <i32 3, i32 3>
159 %cmp3 = icmp ugt <2 x i32> %b, <i32 2, i32 2>
160 %cmp = and <2 x i1> %2, %cmp3
161 ret <2 x i1> %cmp
162}
163
David Majnemera315bd82014-09-15 08:15:28 +0000164define i1 @or_of_icmps0(i32 %b) {
165; CHECK-LABEL: @or_of_icmps0(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000166; CHECK-NEXT: ret i1 true
Sanjay Patel69632442016-03-25 20:12:25 +0000167;
David Majnemera315bd82014-09-15 08:15:28 +0000168 %1 = add i32 %b, 2
169 %2 = icmp uge i32 %1, 4
170 %cmp3 = icmp sle i32 %b, 2
171 %cmp = or i1 %2, %cmp3
172 ret i1 %cmp
David Majnemera315bd82014-09-15 08:15:28 +0000173}
174
Sanjay Patela8f9e572016-09-28 14:17:35 +0000175define <2 x i1> @or_of_icmps0_vec(<2 x i32> %b) {
176; CHECK-LABEL: @or_of_icmps0_vec(
Sanjay Patel220a8732016-09-28 14:27:21 +0000177; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
Sanjay Patela8f9e572016-09-28 14:17:35 +0000178;
179 %1 = add <2 x i32> %b, <i32 2, i32 2>
180 %2 = icmp uge <2 x i32> %1, <i32 4, i32 4>
181 %cmp3 = icmp sle <2 x i32> %b, <i32 2, i32 2>
182 %cmp = or <2 x i1> %2, %cmp3
183 ret <2 x i1> %cmp
184}
185
David Majnemera315bd82014-09-15 08:15:28 +0000186define i1 @or_of_icmps1(i32 %b) {
187; CHECK-LABEL: @or_of_icmps1(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000188; CHECK-NEXT: ret i1 true
Sanjay Patel69632442016-03-25 20:12:25 +0000189;
David Majnemera315bd82014-09-15 08:15:28 +0000190 %1 = add nsw i32 %b, 2
191 %2 = icmp sge i32 %1, 4
192 %cmp3 = icmp sle i32 %b, 2
193 %cmp = or i1 %2, %cmp3
194 ret i1 %cmp
David Majnemera315bd82014-09-15 08:15:28 +0000195}
196
Sanjay Patela8f9e572016-09-28 14:17:35 +0000197define <2 x i1> @or_of_icmps1_vec(<2 x i32> %b) {
198; CHECK-LABEL: @or_of_icmps1_vec(
Sanjay Patel220a8732016-09-28 14:27:21 +0000199; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
Sanjay Patela8f9e572016-09-28 14:17:35 +0000200;
201 %1 = add nsw <2 x i32> %b, <i32 2, i32 2>
202 %2 = icmp sge <2 x i32> %1, <i32 4, i32 4>
203 %cmp3 = icmp sle <2 x i32> %b, <i32 2, i32 2>
204 %cmp = or <2 x i1> %2, %cmp3
205 ret <2 x i1> %cmp
206}
207
David Majnemera315bd82014-09-15 08:15:28 +0000208define i1 @or_of_icmps2(i32 %b) {
209; CHECK-LABEL: @or_of_icmps2(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000210; CHECK-NEXT: ret i1 true
Sanjay Patel69632442016-03-25 20:12:25 +0000211;
David Majnemera315bd82014-09-15 08:15:28 +0000212 %1 = add i32 %b, 2
213 %2 = icmp ugt i32 %1, 3
214 %cmp3 = icmp sle i32 %b, 2
215 %cmp = or i1 %2, %cmp3
216 ret i1 %cmp
David Majnemera315bd82014-09-15 08:15:28 +0000217}
218
Sanjay Patela8f9e572016-09-28 14:17:35 +0000219define <2 x i1> @or_of_icmps2_vec(<2 x i32> %b) {
220; CHECK-LABEL: @or_of_icmps2_vec(
Sanjay Patel220a8732016-09-28 14:27:21 +0000221; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
Sanjay Patela8f9e572016-09-28 14:17:35 +0000222;
223 %1 = add <2 x i32> %b, <i32 2, i32 2>
224 %2 = icmp ugt <2 x i32> %1, <i32 3, i32 3>
225 %cmp3 = icmp sle <2 x i32> %b, <i32 2, i32 2>
226 %cmp = or <2 x i1> %2, %cmp3
227 ret <2 x i1> %cmp
228}
229
David Majnemera315bd82014-09-15 08:15:28 +0000230define i1 @or_of_icmps3(i32 %b) {
231; CHECK-LABEL: @or_of_icmps3(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000232; CHECK-NEXT: ret i1 true
Sanjay Patel69632442016-03-25 20:12:25 +0000233;
David Majnemera315bd82014-09-15 08:15:28 +0000234 %1 = add nsw i32 %b, 2
235 %2 = icmp sgt i32 %1, 3
236 %cmp3 = icmp sle i32 %b, 2
237 %cmp = or i1 %2, %cmp3
238 ret i1 %cmp
David Majnemera315bd82014-09-15 08:15:28 +0000239}
240
Sanjay Patela8f9e572016-09-28 14:17:35 +0000241define <2 x i1> @or_of_icmps3_vec(<2 x i32> %b) {
242; CHECK-LABEL: @or_of_icmps3_vec(
Sanjay Patel220a8732016-09-28 14:27:21 +0000243; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
Sanjay Patela8f9e572016-09-28 14:17:35 +0000244;
245 %1 = add nsw <2 x i32> %b, <i32 2, i32 2>
246 %2 = icmp sgt <2 x i32> %1, <i32 3, i32 3>
247 %cmp3 = icmp sle <2 x i32> %b, <i32 2, i32 2>
248 %cmp = or <2 x i1> %2, %cmp3
249 ret <2 x i1> %cmp
250}
251
David Majnemera315bd82014-09-15 08:15:28 +0000252define i1 @or_of_icmps4(i32 %b) {
253; CHECK-LABEL: @or_of_icmps4(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000254; CHECK-NEXT: ret i1 true
Sanjay Patel69632442016-03-25 20:12:25 +0000255;
David Majnemera315bd82014-09-15 08:15:28 +0000256 %1 = add nuw i32 %b, 2
257 %2 = icmp uge i32 %1, 4
258 %cmp3 = icmp ule i32 %b, 2
259 %cmp = or i1 %2, %cmp3
260 ret i1 %cmp
David Majnemera315bd82014-09-15 08:15:28 +0000261}
262
Sanjay Patela8f9e572016-09-28 14:17:35 +0000263define <2 x i1> @or_of_icmps4_vec(<2 x i32> %b) {
264; CHECK-LABEL: @or_of_icmps4_vec(
Sanjay Patel220a8732016-09-28 14:27:21 +0000265; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
Sanjay Patela8f9e572016-09-28 14:17:35 +0000266;
267 %1 = add nuw <2 x i32> %b, <i32 2, i32 2>
268 %2 = icmp uge <2 x i32> %1, <i32 4, i32 4>
269 %cmp3 = icmp ule <2 x i32> %b, <i32 2, i32 2>
270 %cmp = or <2 x i1> %2, %cmp3
271 ret <2 x i1> %cmp
272}
273
David Majnemera315bd82014-09-15 08:15:28 +0000274define i1 @or_of_icmps5(i32 %b) {
275; CHECK-LABEL: @or_of_icmps5(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000276; CHECK-NEXT: ret i1 true
Sanjay Patel69632442016-03-25 20:12:25 +0000277;
David Majnemera315bd82014-09-15 08:15:28 +0000278 %1 = add nuw i32 %b, 2
279 %2 = icmp ugt i32 %1, 3
280 %cmp3 = icmp ule i32 %b, 2
281 %cmp = or i1 %2, %cmp3
282 ret i1 %cmp
David Majnemera315bd82014-09-15 08:15:28 +0000283}
David Majnemer4efa9ff2014-11-22 07:15:16 +0000284
Sanjay Patela8f9e572016-09-28 14:17:35 +0000285define <2 x i1> @or_of_icmps5_vec(<2 x i32> %b) {
286; CHECK-LABEL: @or_of_icmps5_vec(
Sanjay Patel220a8732016-09-28 14:27:21 +0000287; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
Sanjay Patela8f9e572016-09-28 14:17:35 +0000288;
289 %1 = add nuw <2 x i32> %b, <i32 2, i32 2>
290 %2 = icmp ugt <2 x i32> %1, <i32 3, i32 3>
291 %cmp3 = icmp ule <2 x i32> %b, <i32 2, i32 2>
292 %cmp = or <2 x i1> %2, %cmp3
293 ret <2 x i1> %cmp
294}
295
David Majnemer4efa9ff2014-11-22 07:15:16 +0000296define i32 @neg_nuw(i32 %x) {
297; CHECK-LABEL: @neg_nuw(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000298; CHECK-NEXT: ret i32 0
Sanjay Patel69632442016-03-25 20:12:25 +0000299;
David Majnemer4efa9ff2014-11-22 07:15:16 +0000300 %neg = sub nuw i32 0, %x
301 ret i32 %neg
David Majnemer4efa9ff2014-11-22 07:15:16 +0000302}
David Majnemer1af36e52014-12-06 10:51:40 +0000303
304define i1 @and_icmp1(i32 %x, i32 %y) {
Sanjay Patel69632442016-03-25 20:12:25 +0000305; CHECK-LABEL: @and_icmp1(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000306; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 %x, %y
Sanjay Patel69632442016-03-25 20:12:25 +0000307; CHECK-NEXT: ret i1 [[TMP1]]
308;
David Majnemer1af36e52014-12-06 10:51:40 +0000309 %1 = icmp ult i32 %x, %y
310 %2 = icmp ne i32 %y, 0
311 %3 = and i1 %1, %2
312 ret i1 %3
313}
David Majnemer1af36e52014-12-06 10:51:40 +0000314
David Majnemerd5b3aa42014-12-08 18:30:43 +0000315define i1 @and_icmp2(i32 %x, i32 %y) {
Sanjay Patel69632442016-03-25 20:12:25 +0000316; CHECK-LABEL: @and_icmp2(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000317; CHECK-NEXT: ret i1 false
Sanjay Patel69632442016-03-25 20:12:25 +0000318;
David Majnemerd5b3aa42014-12-08 18:30:43 +0000319 %1 = icmp ult i32 %x, %y
320 %2 = icmp eq i32 %y, 0
321 %3 = and i1 %1, %2
322 ret i1 %3
323}
David Majnemerd5b3aa42014-12-08 18:30:43 +0000324
David Majnemer1af36e52014-12-06 10:51:40 +0000325define i1 @or_icmp1(i32 %x, i32 %y) {
Sanjay Patel69632442016-03-25 20:12:25 +0000326; CHECK-LABEL: @or_icmp1(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000327; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 %y, 0
Sanjay Patel69632442016-03-25 20:12:25 +0000328; CHECK-NEXT: ret i1 [[TMP1]]
329;
David Majnemer1af36e52014-12-06 10:51:40 +0000330 %1 = icmp ult i32 %x, %y
331 %2 = icmp ne i32 %y, 0
332 %3 = or i1 %1, %2
333 ret i1 %3
334}
David Majnemer1af36e52014-12-06 10:51:40 +0000335
336define i1 @or_icmp2(i32 %x, i32 %y) {
Sanjay Patel69632442016-03-25 20:12:25 +0000337; CHECK-LABEL: @or_icmp2(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000338; CHECK-NEXT: ret i1 true
Sanjay Patel69632442016-03-25 20:12:25 +0000339;
David Majnemer1af36e52014-12-06 10:51:40 +0000340 %1 = icmp uge i32 %x, %y
341 %2 = icmp ne i32 %y, 0
342 %3 = or i1 %1, %2
343 ret i1 %3
344}
David Majnemer1af36e52014-12-06 10:51:40 +0000345
346define i1 @or_icmp3(i32 %x, i32 %y) {
Sanjay Patel69632442016-03-25 20:12:25 +0000347; CHECK-LABEL: @or_icmp3(
Sanjay Patela4b052c2016-06-19 21:40:12 +0000348; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i32 %x, %y
Sanjay Patel69632442016-03-25 20:12:25 +0000349; CHECK-NEXT: ret i1 [[TMP1]]
350;
David Majnemer1af36e52014-12-06 10:51:40 +0000351 %1 = icmp uge i32 %x, %y
352 %2 = icmp eq i32 %y, 0
353 %3 = or i1 %1, %2
354 ret i1 %3
355}
Sanjay Patel69632442016-03-25 20:12:25 +0000356
Sanjay Patel9ad8fb62016-06-20 20:59:59 +0000357define i1 @disjoint_cmps(i32 %A) {
358; CHECK-LABEL: @disjoint_cmps(
359; CHECK-NEXT: ret i1 false
360;
361 %B = icmp eq i32 %A, 1
362 %C = icmp sge i32 %A, 3
363 %D = and i1 %B, %C
364 ret i1 %D
365}
366
367define i1 @disjoint_cmps2(i32 %X) {
368; CHECK-LABEL: @disjoint_cmps2(
369; CHECK-NEXT: ret i1 false
370;
371 %a = icmp ult i32 %X, 31
372 %b = icmp slt i32 %X, 0
373 %c = and i1 %a, %b
374 ret i1 %c
375}
376
377; PR27869 - Look through casts to eliminate cmps and bitwise logic.
378
Sanjay Patela4b052c2016-06-19 21:40:12 +0000379define i32 @and_of_zexted_icmps(i32 %i) {
380; CHECK-LABEL: @and_of_zexted_icmps(
Sanjay Patel9ad8fb62016-06-20 20:59:59 +0000381; CHECK-NEXT: ret i32 0
Sanjay Patela4b052c2016-06-19 21:40:12 +0000382;
Sanjay Patel9ad8fb62016-06-20 20:59:59 +0000383 %cmp0 = icmp eq i32 %i, 0
384 %conv0 = zext i1 %cmp0 to i32
Sanjay Patela4b052c2016-06-19 21:40:12 +0000385 %cmp1 = icmp ugt i32 %i, 4
Sanjay Patel9ad8fb62016-06-20 20:59:59 +0000386 %conv1 = zext i1 %cmp1 to i32
387 %and = and i32 %conv0, %conv1
Sanjay Patela4b052c2016-06-19 21:40:12 +0000388 ret i32 %and
389}
390
Sanjay Patel9ad8fb62016-06-20 20:59:59 +0000391; Make sure vectors work too.
392
Sanjay Patela4b052c2016-06-19 21:40:12 +0000393define <4 x i32> @and_of_zexted_icmps_vec(<4 x i32> %i) {
394; CHECK-LABEL: @and_of_zexted_icmps_vec(
Sanjay Patel9ad8fb62016-06-20 20:59:59 +0000395; CHECK-NEXT: ret <4 x i32> zeroinitializer
Sanjay Patela4b052c2016-06-19 21:40:12 +0000396;
Sanjay Patel9ad8fb62016-06-20 20:59:59 +0000397 %cmp0 = icmp eq <4 x i32> %i, zeroinitializer
398 %conv0 = zext <4 x i1> %cmp0 to <4 x i32>
Sanjay Patela4b052c2016-06-19 21:40:12 +0000399 %cmp1 = icmp slt <4 x i32> %i, zeroinitializer
Sanjay Patel9ad8fb62016-06-20 20:59:59 +0000400 %conv1 = zext <4 x i1> %cmp1 to <4 x i32>
401 %and = and <4 x i32> %conv0, %conv1
Sanjay Patela4b052c2016-06-19 21:40:12 +0000402 ret <4 x i32> %and
403}
404
Sanjay Patel9ad8fb62016-06-20 20:59:59 +0000405; Try a different cast and weird types.
406
407define i5 @and_of_sexted_icmps(i3 %i) {
408; CHECK-LABEL: @and_of_sexted_icmps(
409; CHECK-NEXT: ret i5 0
410;
411 %cmp0 = icmp eq i3 %i, 0
412 %conv0 = sext i1 %cmp0 to i5
413 %cmp1 = icmp ugt i3 %i, 1
414 %conv1 = sext i1 %cmp1 to i5
415 %and = and i5 %conv0, %conv1
416 ret i5 %and
417}
418
419; Try a different cast and weird vector types.
420
421define i3 @and_of_bitcast_icmps_vec(<3 x i65> %i) {
422; CHECK-LABEL: @and_of_bitcast_icmps_vec(
423; CHECK-NEXT: ret i3 0
424;
425 %cmp0 = icmp sgt <3 x i65> %i, zeroinitializer
426 %conv0 = bitcast <3 x i1> %cmp0 to i3
427 %cmp1 = icmp slt <3 x i65> %i, zeroinitializer
428 %conv1 = bitcast <3 x i1> %cmp1 to i3
429 %and = and i3 %conv0, %conv1
430 ret i3 %and
431}
432
433; We can't do this if the casts are different.
434
435define i16 @and_of_different_cast_icmps(i8 %i) {
436; CHECK-LABEL: @and_of_different_cast_icmps(
437; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i8 %i, 0
438; CHECK-NEXT: [[CONV0:%.*]] = zext i1 [[CMP0]] to i16
439; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i8 %i, 1
440; CHECK-NEXT: [[CONV1:%.*]] = sext i1 [[CMP1]] to i16
441; CHECK-NEXT: [[AND:%.*]] = and i16 [[CONV0]], [[CONV1]]
442; CHECK-NEXT: ret i16 [[AND]]
443;
444 %cmp0 = icmp eq i8 %i, 0
445 %conv0 = zext i1 %cmp0 to i16
446 %cmp1 = icmp eq i8 %i, 1
447 %conv1 = sext i1 %cmp1 to i16
448 %and = and i16 %conv0, %conv1
449 ret i16 %and
450}
451
452define <2 x i3> @and_of_different_cast_icmps_vec(<2 x i8> %i, <2 x i16> %j) {
453; CHECK-LABEL: @and_of_different_cast_icmps_vec(
454; CHECK-NEXT: [[CMP0:%.*]] = icmp eq <2 x i8> %i, zeroinitializer
455; CHECK-NEXT: [[CONV0:%.*]] = zext <2 x i1> [[CMP0]] to <2 x i3>
456; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt <2 x i16> %j, <i16 1, i16 1>
457; CHECK-NEXT: [[CONV1:%.*]] = zext <2 x i1> [[CMP1]] to <2 x i3>
458; CHECK-NEXT: [[AND:%.*]] = and <2 x i3> [[CONV0]], [[CONV1]]
459; CHECK-NEXT: ret <2 x i3> [[AND]]
460;
461 %cmp0 = icmp eq <2 x i8> %i, zeroinitializer
462 %conv0 = zext <2 x i1> %cmp0 to <2 x i3>
463 %cmp1 = icmp ugt <2 x i16> %j, <i16 1, i16 1>
464 %conv1 = zext <2 x i1> %cmp1 to <2 x i3>
465 %and = and <2 x i3> %conv0, %conv1
466 ret <2 x i3> %and
467}
468