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gerrit-public.fairphone.software / toolchain / llvm-project / 31b941a60dc0e2cb1598673c1d85e01d0df02ae6 / . / llvm / test / CodeGen / PTX / setp.ll
blob: e0044d6c31e9a54b968cd14e3c72770f40145856 [file] [log] [blame]
Justin Holewinski7d8895e2011-04-20 15:37:17 +0000[diff] [blame]1; RUN: llc < %s -march=ptx32 | FileCheck %s
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]2
3define ptx_device i32 @test_setp_eq_u32_rr(i32 %x, i32 %y) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]4; CHECK: setp.eq.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}};
5; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]6; CHECK-NEXT: ret;
7 %p = icmp eq i32 %x, %y
8 %z = zext i1 %p to i32
9 ret i32 %z
10}
11
12define ptx_device i32 @test_setp_ne_u32_rr(i32 %x, i32 %y) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]13; CHECK: setp.ne.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}};
14; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]15; CHECK-NEXT: ret;
16 %p = icmp ne i32 %x, %y
17 %z = zext i1 %p to i32
18 ret i32 %z
19}
20
21define ptx_device i32 @test_setp_lt_u32_rr(i32 %x, i32 %y) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]22; CHECK: setp.lt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}};
23; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]24; CHECK-NEXT: ret;
25 %p = icmp ult i32 %x, %y
26 %z = zext i1 %p to i32
27 ret i32 %z
28}
29
30define ptx_device i32 @test_setp_le_u32_rr(i32 %x, i32 %y) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]31; CHECK: setp.le.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}};
32; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]33; CHECK-NEXT: ret;
34 %p = icmp ule i32 %x, %y
35 %z = zext i1 %p to i32
36 ret i32 %z
37}
38
39define ptx_device i32 @test_setp_gt_u32_rr(i32 %x, i32 %y) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]40; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}};
41; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]42; CHECK-NEXT: ret;
43 %p = icmp ugt i32 %x, %y
44 %z = zext i1 %p to i32
45 ret i32 %z
46}
47
48define ptx_device i32 @test_setp_ge_u32_rr(i32 %x, i32 %y) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]49; CHECK: setp.ge.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}};
50; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]51; CHECK-NEXT: ret;
52 %p = icmp uge i32 %x, %y
53 %z = zext i1 %p to i32
54 ret i32 %z
55}
56
Justin Holewinski6fafebf2011-06-22 02:09:50 +0000[diff] [blame]57define ptx_device i32 @test_setp_lt_s32_rr(i32 %x, i32 %y) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]58; CHECK: setp.lt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}};
59; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Justin Holewinski6fafebf2011-06-22 02:09:50 +0000[diff] [blame]60; CHECK-NEXT: ret;
61 %p = icmp slt i32 %x, %y
62 %z = zext i1 %p to i32
63 ret i32 %z
64}
65
66define ptx_device i32 @test_setp_le_s32_rr(i32 %x, i32 %y) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]67; CHECK: setp.le.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}};
68; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Justin Holewinski6fafebf2011-06-22 02:09:50 +0000[diff] [blame]69; CHECK-NEXT: ret;
70 %p = icmp sle i32 %x, %y
71 %z = zext i1 %p to i32
72 ret i32 %z
73}
74
75define ptx_device i32 @test_setp_gt_s32_rr(i32 %x, i32 %y) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]76; CHECK: setp.gt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}};
77; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Justin Holewinski6fafebf2011-06-22 02:09:50 +0000[diff] [blame]78; CHECK-NEXT: ret;
79 %p = icmp sgt i32 %x, %y
80 %z = zext i1 %p to i32
81 ret i32 %z
82}
83
84define ptx_device i32 @test_setp_ge_s32_rr(i32 %x, i32 %y) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]85; CHECK: setp.ge.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}};
86; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Justin Holewinski6fafebf2011-06-22 02:09:50 +0000[diff] [blame]87; CHECK-NEXT: ret;
88 %p = icmp sge i32 %x, %y
89 %z = zext i1 %p to i32
90 ret i32 %z
91}
92
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]93define ptx_device i32 @test_setp_eq_u32_ri(i32 %x) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]94; CHECK: setp.eq.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1;
95; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]96; CHECK-NEXT: ret;
97 %p = icmp eq i32 %x, 1
98 %z = zext i1 %p to i32
99 ret i32 %z
100}
101
102define ptx_device i32 @test_setp_ne_u32_ri(i32 %x) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]103; CHECK: setp.ne.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1;
104; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]105; CHECK-NEXT: ret;
106 %p = icmp ne i32 %x, 1
107 %z = zext i1 %p to i32
108 ret i32 %z
109}
110
111define ptx_device i32 @test_setp_lt_u32_ri(i32 %x) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]112; CHECK: setp.eq.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0;
113; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]114; CHECK-NEXT: ret;
115 %p = icmp ult i32 %x, 1
116 %z = zext i1 %p to i32
117 ret i32 %z
118}
119
120define ptx_device i32 @test_setp_le_u32_ri(i32 %x) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]121; CHECK: setp.lt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 2;
122; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]123; CHECK-NEXT: ret;
124 %p = icmp ule i32 %x, 1
125 %z = zext i1 %p to i32
126 ret i32 %z
127}
128
129define ptx_device i32 @test_setp_gt_u32_ri(i32 %x) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]130; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1;
131; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]132; CHECK-NEXT: ret;
133 %p = icmp ugt i32 %x, 1
134 %z = zext i1 %p to i32
135 ret i32 %z
136}
137
138define ptx_device i32 @test_setp_ge_u32_ri(i32 %x) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]139; CHECK: setp.ne.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0;
140; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioua19f0752011-03-14 11:26:01 +0000[diff] [blame]141; CHECK-NEXT: ret;
142 %p = icmp uge i32 %x, 1
143 %z = zext i1 %p to i32
144 ret i32 %z
145}
Che-Liang Chioue34b2712011-04-02 08:51:39 +0000[diff] [blame]146
Justin Holewinski6fafebf2011-06-22 02:09:50 +0000[diff] [blame]147define ptx_device i32 @test_setp_lt_s32_ri(i32 %x) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]148; CHECK: setp.lt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1;
149; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Justin Holewinski6fafebf2011-06-22 02:09:50 +0000[diff] [blame]150; CHECK-NEXT: ret;
151 %p = icmp slt i32 %x, 1
152 %z = zext i1 %p to i32
153 ret i32 %z
154}
155
156define ptx_device i32 @test_setp_le_s32_ri(i32 %x) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]157; CHECK: setp.lt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, 2;
158; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Justin Holewinski6fafebf2011-06-22 02:09:50 +0000[diff] [blame]159; CHECK-NEXT: ret;
160 %p = icmp sle i32 %x, 1
161 %z = zext i1 %p to i32
162 ret i32 %z
163}
164
165define ptx_device i32 @test_setp_gt_s32_ri(i32 %x) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]166; CHECK: setp.gt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1;
167; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Justin Holewinski6fafebf2011-06-22 02:09:50 +0000[diff] [blame]168; CHECK-NEXT: ret;
169 %p = icmp sgt i32 %x, 1
170 %z = zext i1 %p to i32
171 ret i32 %z
172}
173
174define ptx_device i32 @test_setp_ge_s32_ri(i32 %x) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]175; CHECK: setp.gt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0;
176; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Justin Holewinski6fafebf2011-06-22 02:09:50 +0000[diff] [blame]177; CHECK-NEXT: ret;
178 %p = icmp sge i32 %x, 1
179 %z = zext i1 %p to i32
180 ret i32 %z
181}
182
Che-Liang Chioue34b2712011-04-02 08:51:39 +0000[diff] [blame]183define ptx_device i32 @test_setp_4_op_format_1(i32 %x, i32 %y, i32 %u, i32 %v) {
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]184; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}};
185; CHECK-NEXT: setp.eq.and.u32 p[[P0]], r{{[0-9]+}}, r{{[0-9]+}}, p[[P0]];
186; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioue34b2712011-04-02 08:51:39 +0000[diff] [blame]187; CHECK-NEXT: ret;
188 %c = icmp eq i32 %x, %y
189 %d = icmp ugt i32 %u, %v
190 %e = and i1 %c, %d
191 %z = zext i1 %e to i32
192 ret i32 %z
193}
194
195define ptx_device i32 @test_setp_4_op_format_2(i32 %x, i32 %y, i32 %w) {
Dan Baileyb49b7362011-06-25 19:41:17 +0000[diff] [blame]196; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0;
Justin Holewinski6cdd72a2011-06-23 18:10:13 +0000[diff] [blame]197; CHECK-NEXT: setp.eq.and.u32 p[[P0]], r{{[0-9]+}}, r{{[0-9]+}}, !p[[P0]];
198; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]];
Che-Liang Chioue34b2712011-04-02 08:51:39 +0000[diff] [blame]199; CHECK-NEXT: ret;
200 %c = trunc i32 %w to i1
201 %d = icmp eq i32 %x, %y
202 %e = xor i1 %c, 1
203 %f = and i1 %d, %e
204 %z = zext i1 %f to i32
205 ret i32 %z
206}