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gerrit-public.fairphone.software / toolchain / llvm-project / 31ccb51a7f1b6fddaa684095d78c4532598cf51d / . / llvm / test / CodeGen / AArch64 / fast-isel-tbz.ll
blob: 598826763787b5523f2a57d862bec85663be8583 [file] [log] [blame]
Juergen Ributzkaeb67bd82014-11-25 04:16:15 +0000[diff] [blame]1; RUN: llc -aarch64-atomic-cfg-tidy=0 -verify-machineinstrs -mtriple=aarch64-apple-darwin < %s | FileCheck --check-prefix=CHECK %s
Mehdi Amini945a6602015-02-27 18:32:11 +0000[diff] [blame]2; RUN: llc -fast-isel -fast-isel-abort=1 -aarch64-atomic-cfg-tidy=0 -verify-machineinstrs -mtriple=aarch64-apple-darwin < %s | FileCheck --check-prefix=CHECK --check-prefix=FAST %s
Juergen Ributzkac110c0b2014-09-30 19:59:35 +0000[diff] [blame]3
4define i32 @icmp_eq_i8(i8 zeroext %a) {
5; CHECK-LABEL: icmp_eq_i8
6; CHECK: tbz {{w[0-9]+}}, #0, {{LBB.+_2}}
7 %1 = and i8 %a, 1
8 %2 = icmp eq i8 %1, 0
9 br i1 %2, label %bb1, label %bb2, !prof !0
10bb1:
11 ret i32 1
12bb2:
13 ret i32 0
14}
15
16define i32 @icmp_eq_i16(i16 zeroext %a) {
17; CHECK-LABEL: icmp_eq_i16
18; CHECK: tbz w0, #1, {{LBB.+_2}}
19 %1 = and i16 %a, 2
20 %2 = icmp eq i16 %1, 0
21 br i1 %2, label %bb1, label %bb2, !prof !0
22bb1:
23 ret i32 1
24bb2:
25 ret i32 0
26}
27
28define i32 @icmp_eq_i32(i32 %a) {
29; CHECK-LABEL: icmp_eq_i32
30; CHECK: tbz w0, #2, {{LBB.+_2}}
31 %1 = and i32 %a, 4
32 %2 = icmp eq i32 %1, 0
33 br i1 %2, label %bb1, label %bb2, !prof !0
34bb1:
35 ret i32 1
36bb2:
37 ret i32 0
38}
39
40define i32 @icmp_eq_i64_1(i64 %a) {
41; CHECK-LABEL: icmp_eq_i64_1
42; CHECK: tbz w0, #3, {{LBB.+_2}}
43 %1 = and i64 %a, 8
44 %2 = icmp eq i64 %1, 0
45 br i1 %2, label %bb1, label %bb2, !prof !0
46bb1:
47 ret i32 1
48bb2:
49 ret i32 0
50}
51
52define i32 @icmp_eq_i64_2(i64 %a) {
53; CHECK-LABEL: icmp_eq_i64_2
54; CHECK: tbz x0, #32, {{LBB.+_2}}
55 %1 = and i64 %a, 4294967296
56 %2 = icmp eq i64 %1, 0
57 br i1 %2, label %bb1, label %bb2, !prof !0
58bb1:
59 ret i32 1
60bb2:
61 ret i32 0
62}
63
64define i32 @icmp_ne_i8(i8 zeroext %a) {
65; CHECK-LABEL: icmp_ne_i8
66; CHECK: tbnz w0, #0, {{LBB.+_2}}
67 %1 = and i8 %a, 1
68 %2 = icmp ne i8 %1, 0
69 br i1 %2, label %bb1, label %bb2, !prof !0
70bb1:
71 ret i32 1
72bb2:
73 ret i32 0
74}
75
76define i32 @icmp_ne_i16(i16 zeroext %a) {
77; CHECK-LABEL: icmp_ne_i16
78; CHECK: tbnz w0, #1, {{LBB.+_2}}
79 %1 = and i16 %a, 2
80 %2 = icmp ne i16 %1, 0
81 br i1 %2, label %bb1, label %bb2, !prof !0
82bb1:
83 ret i32 1
84bb2:
85 ret i32 0
86}
87
88define i32 @icmp_ne_i32(i32 %a) {
89; CHECK-LABEL: icmp_ne_i32
90; CHECK: tbnz w0, #2, {{LBB.+_2}}
91 %1 = and i32 %a, 4
92 %2 = icmp ne i32 %1, 0
93 br i1 %2, label %bb1, label %bb2, !prof !0
94bb1:
95 ret i32 1
96bb2:
97 ret i32 0
98}
99
100define i32 @icmp_ne_i64_1(i64 %a) {
101; CHECK-LABEL: icmp_ne_i64_1
102; CHECK: tbnz w0, #3, {{LBB.+_2}}
103 %1 = and i64 %a, 8
104 %2 = icmp ne i64 %1, 0
105 br i1 %2, label %bb1, label %bb2, !prof !0
106bb1:
107 ret i32 1
108bb2:
109 ret i32 0
110}
111
112define i32 @icmp_ne_i64_2(i64 %a) {
113; CHECK-LABEL: icmp_ne_i64_2
114; CHECK: tbnz x0, #32, {{LBB.+_2}}
115 %1 = and i64 %a, 4294967296
116 %2 = icmp ne i64 %1, 0
117 br i1 %2, label %bb1, label %bb2, !prof !0
118bb1:
119 ret i32 1
120bb2:
121 ret i32 0
122}
123
Juergen Ributzkaeb67bd82014-11-25 04:16:15 +0000[diff] [blame]124define i32 @icmp_slt_i8(i8 zeroext %a) {
125; FAST-LABEL: icmp_slt_i8
126; FAST: tbnz w0, #7, {{LBB.+_2}}
127 %1 = icmp slt i8 %a, 0
128 br i1 %1, label %bb1, label %bb2, !prof !0
129bb1:
130 ret i32 1
131bb2:
132 ret i32 0
133}
134
135define i32 @icmp_slt_i16(i16 zeroext %a) {
136; FAST-LABEL: icmp_slt_i16
137; FAST: tbnz w0, #15, {{LBB.+_2}}
138 %1 = icmp slt i16 %a, 0
139 br i1 %1, label %bb1, label %bb2, !prof !0
140bb1:
141 ret i32 1
142bb2:
143 ret i32 0
144}
145
146define i32 @icmp_slt_i32(i32 %a) {
147; CHECK-LABEL: icmp_slt_i32
148; CHECK: tbnz w0, #31, {{LBB.+_2}}
149 %1 = icmp slt i32 %a, 0
150 br i1 %1, label %bb1, label %bb2, !prof !0
151bb1:
152 ret i32 1
153bb2:
154 ret i32 0
155}
156
157define i32 @icmp_slt_i64(i64 %a) {
158; CHECK-LABEL: icmp_slt_i64
159; CHECK: tbnz x0, #63, {{LBB.+_2}}
160 %1 = icmp slt i64 %a, 0
161 br i1 %1, label %bb1, label %bb2, !prof !0
162bb1:
163 ret i32 1
164bb2:
165 ret i32 0
166}
167
168define i32 @icmp_sge_i8(i8 zeroext %a) {
169; FAST-LABEL: icmp_sge_i8
170; FAST: tbz w0, #7, {{LBB.+_2}}
171 %1 = icmp sge i8 %a, 0
172 br i1 %1, label %bb1, label %bb2, !prof !0
173bb1:
174 ret i32 1
175bb2:
176 ret i32 0
177}
178
179define i32 @icmp_sge_i16(i16 zeroext %a) {
180; FAST-LABEL: icmp_sge_i16
181; FAST: tbz w0, #15, {{LBB.+_2}}
182 %1 = icmp sge i16 %a, 0
183 br i1 %1, label %bb1, label %bb2, !prof !0
184bb1:
185 ret i32 1
186bb2:
187 ret i32 0
188}
189
190define i32 @icmp_sle_i8(i8 zeroext %a) {
191; FAST-LABEL: icmp_sle_i8
192; FAST: tbnz w0, #7, {{LBB.+_2}}
193 %1 = icmp sle i8 %a, -1
194 br i1 %1, label %bb1, label %bb2, !prof !0
195bb1:
196 ret i32 1
197bb2:
198 ret i32 0
199}
200
201define i32 @icmp_sle_i16(i16 zeroext %a) {
202; FAST-LABEL: icmp_sle_i16
203; FAST: tbnz w0, #15, {{LBB.+_2}}
204 %1 = icmp sle i16 %a, -1
205 br i1 %1, label %bb1, label %bb2, !prof !0
206bb1:
207 ret i32 1
208bb2:
209 ret i32 0
210}
211
212define i32 @icmp_sle_i32(i32 %a) {
213; CHECK-LABEL: icmp_sle_i32
214; CHECK: tbnz w0, #31, {{LBB.+_2}}
215 %1 = icmp sle i32 %a, -1
216 br i1 %1, label %bb1, label %bb2, !prof !0
217bb1:
218 ret i32 1
219bb2:
220 ret i32 0
221}
222
223define i32 @icmp_sle_i64(i64 %a) {
224; CHECK-LABEL: icmp_sle_i64
225; CHECK: tbnz x0, #63, {{LBB.+_2}}
226 %1 = icmp sle i64 %a, -1
227 br i1 %1, label %bb1, label %bb2, !prof !0
228bb1:
229 ret i32 1
230bb2:
231 ret i32 0
232}
233
234define i32 @icmp_sgt_i8(i8 zeroext %a) {
235; FAST-LABEL: icmp_sgt_i8
236; FAST: tbz w0, #7, {{LBB.+_2}}
237 %1 = icmp sgt i8 %a, -1
238 br i1 %1, label %bb1, label %bb2, !prof !0
239bb1:
240 ret i32 1
241bb2:
242 ret i32 0
243}
244
245define i32 @icmp_sgt_i16(i16 zeroext %a) {
246; FAST-LABEL: icmp_sgt_i16
247; FAST: tbz w0, #15, {{LBB.+_2}}
248 %1 = icmp sgt i16 %a, -1
249 br i1 %1, label %bb1, label %bb2, !prof !0
250bb1:
251 ret i32 1
252bb2:
253 ret i32 0
254}
255
256define i32 @icmp_sgt_i32(i32 %a) {
257; CHECK-LABEL: icmp_sgt_i32
258; CHECK: tbz w0, #31, {{LBB.+_2}}
259 %1 = icmp sgt i32 %a, -1
260 br i1 %1, label %bb1, label %bb2, !prof !0
261bb1:
262 ret i32 1
263bb2:
264 ret i32 0
265}
266
267define i32 @icmp_sgt_i64(i64 %a) {
268; FAST-LABEL: icmp_sgt_i64
269; FAST: tbz x0, #63, {{LBB.+_2}}
270 %1 = icmp sgt i64 %a, -1
271 br i1 %1, label %bb1, label %bb2, !prof !0
272bb1:
273 ret i32 1
274bb2:
275 ret i32 0
276}
277
Juergen Ributzkaeae91042014-10-27 19:16:48 +0000[diff] [blame]278; Test that we don't fold the 'and' instruction into the compare.
279define i32 @icmp_eq_and_i32(i32 %a, i1 %c) {
280; CHECK-LABEL: icmp_eq_and_i32
281; CHECK: and [[REG:w[0-9]+]], w0, #0x4
282; CHECK-NEXT: cbz [[REG]], {{LBB.+_3}}
283 %1 = and i32 %a, 4
284 br i1 %c, label %bb0, label %bb2
285bb0:
286 %2 = icmp eq i32 %1, 0
287 br i1 %2, label %bb1, label %bb2, !prof !0
288bb1:
289 ret i32 1
290bb2:
291 ret i32 0
292}
293
Duncan P. N. Exon Smithbe7ea192014-12-15 19:07:53 +0000[diff] [blame]294!0 = !{!"branch_weights", i32 0, i32 2147483647}
295!1 = !{!"branch_weights", i32 2147483647, i32 0}